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Contents

README

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S2-LPQTR

STMicroelectronics · RF Transceiver ICs · QFN-24-EP(4x4)

S2-LPQTR from STMicroelectronics, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD_SMPS power_in Analog power supply input for SMPS block, accepts 1.8 V to 3.6 V.
2 SMPS1 power_out SMPS step-down converter output ranging from 1.1 V to 1.8 V, requires external LC filtering.
3 SMPS2 power_in SMPS regulated voltage input after LC filtering, accepts 1.1 V to 1.8 V from SMPS1.
4 XOUT output Crystal oscillator output terminal, leave floating when driving XIN with external clock source.
5 XIN input Crystal oscillator input or external clock source accepting 0.2 V DC minimum with 400 mVpp AC amplitude, maximum instantaneous voltage 1.4 V.
6 SDN input Shutdown input pin, must be held low in all operating modes, high voltage enters shutdown.
7 VDD_ANA_SYNTH power_in Analog and synthesizer circuit power supply, accepts 1.8 V to 3.6 V.
8 VR_SYNTH power_out Synthesizer LDO output at 1.2 V for external decoupling capacitor.
9 VREF_VCO power_out VCO LDO band-gap reference voltage at 1.2 V for external decoupling capacitor.
10 VDD_VCO_TX power_in VCO and transmitter power supply, accepts 1.8 V to 3.6 V.
11 TX output RF output from power amplifier with programmable output power from -30 dBm to +16 dBm.
12 VR_RF power_out RX low-dropout regulator output at 1.2 V for external decoupling capacitor.
13 RXn input Differential RF input negative terminal for dual-ended low-noise amplifier.
14 RXp input Differential RF input positive terminal for dual-ended low-noise amplifier.
15 VDD_RX_DIG power_in Receiver and digital circuit power supply, accepts 1.8 V to 3.6 V.
16 SDO tri_state SPI slave data output (MISO), tri-state high-impedance when chip select is high.
17 SDI input SPI slave data input (MOSI) from master microcontroller.
18 SCLK input SPI slave clock input, supports up to 10 MHz clock frequency.
19 CSn input SPI chip select active-low input for bus contention control.
20 GPIO0 bidirectional General-purpose I/O, configurable as digital input or output through SPI registers.
21 GPIO1 bidirectional General-purpose I/O, configurable as digital input or output through SPI registers.
22 GPIO2 bidirectional General-purpose I/O, configurable as digital input or output through SPI registers.
23 GPIO3 bidirectional General-purpose I/O, configurable as digital input or output through SPI registers.
24 VR_DIG power_out Digital circuit LDO output at 1.2 V for external decoupling capacitor.
25 GND power_in Device ground reference and exposed thermal pad for heat dissipation.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package QFN-24-EP(4x4)
Category RF And Wireless
Pins 25

CAD (KiCad official)

  • Symbol: S2-LPQTR
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: s2-lpqtr-etched.step / s2-lpqtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); s2-lpqtr.step / s2-lpqtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (90 pp, sha256 d405f18ec87fd3ad, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF