component

S-LR6230B18F

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LRC Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN1x1-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)s-lr6230b18ffactory-2.0.0extractor-text

Verified S-LR6230B18F

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier lcsc, 5 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: S-LR6230B18F · DFN1x1-4 · 5 pins
  • ✓copper: 5 copper pads, none touching another net
  • •datasheet (warn): 1/5 pin names appear NOWHERE in the datasheet text: ['2:VSS@p1']
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-5mdqkdt0/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 5 pins = 5 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 5 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ s-lr6230b18f.kicad_sym✓ s-lr6230b18f.kicad_mod✓ s-lr6230b18f.step
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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 11h ago
viewers s-lr6230b18f: viewers · Ray 11h ago
package.json Publish 0.1.0 · Ray 11h ago
page.json Set visibility: public · Ray 11h ago
README.md Publish 0.1.0 · Ray 11h ago
s-lr6230b18f-etched.glb Publish 0.1.0 · Ray 11h ago
s-lr6230b18f-etched.step s-lr6230b18f: factory component page (tier=lcsc) · Ray 11h ago
s-lr6230b18f-hero.glb s-lr6230b18f: hero GLB from the etched model (keeps the MPN mark) · Ray 11h ago
s-lr6230b18f-hero.overlay.json Publish 0.1.0 · Ray 11h ago
s-lr6230b18f.glb Publish 0.1.0 · Ray 11h ago
s-lr6230b18f.kicad_mod Publish 0.1.0 · Ray 11h ago
s-lr6230b18f.kicad_sym Publish 0.1.0 · Ray 11h ago
s-lr6230b18f.lbr Publish 0.1.0 · Ray 11h ago
s-lr6230b18f.step Publish 0.1.0 · Ray 11h ago
verification.json Verified: Published by the parts factory: tier lcsc, 5 pins · Ray 11h ago

S-LR6230B18F

LRC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN1x1-4

S-LR6230B18F from LRC, in a DFN1x1-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated output voltage pin (1.2 to 5.0V options, 300mA minimum output current).
2 VSS power_in Ground pin.
3 CE input Chip enable pin with TTL-logic control; high level is at least 1.5V, low level (shutdown) is at most 0.3V.
4 VIN power_in Power input pin with operating range 2.0V to 7.0V (absolute maximum VSS+8V).
5 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer LRC
Package DFN1x1-4
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output Voltage Effective Accuracy VOUT(E) 0.98 1.02 VOUT IOUT 1mA 3
Supply Current ISS 5 10 μA IOUT 0 3
Standby Current ISTBY 0.1 μA CE VSS 3
Output Current IOUT 300 mA 3
Dropout Voltage Vdif 150 mV IOUT 150mA, VOUT 3.0V 3
Load Regulation ΔVOUT 10 mV VIN VOUT+1V, 1mA≤IOUT≤100mA 3
Line Regulation ΔVOUT/(VOUT·ΔVIN) 0.01 0.2 %/V IOUT 10mA, VOUT+1V≤VIN≤6V 3
Output Voltage Temperature Characteristics ΔVOUT/(ΔTa·VOUT) 100 ppm IOUT 10mA, -40 to +85°C 3
Short Current IShort 50 mA VOUT VSS 3
Input Voltage VIN 2 7 V 3
Power Supply Rejection Rate 1kHz PSRR 65 dB IOUT 50mA, 1kHz 3
Power Supply Rejection Rate 10kHz PSRR 50 dB IOUT 50mA, 10kHz 3
CE High Voltage VCE(H) 1.5 V max VIN 3
CE Low Voltage VCE(L) 0.3 V 3
Current Limit ILIM 500 mA 3
Output Current (absolute maximum) IOUT 600 mA 3
Input Voltage (absolute maximum) VIN 8 V referenced to VSS, VSS-0.3 to VSS+8 3
Power Dissipation DFN1X1-4 Pd 400 mW 3
Soldering Temperature Tsolder 260 °C 10 s 3

CAD (KiCad official)

  • Symbol: S-LR6230B18F
  • Footprint: Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm
  • 3D model: DFN1x1-4 (KiCad packages3D, STEP)
  • 3D model files: s-lr6230b18f-etched.step / s-lr6230b18f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); s-lr6230b18f.step / s-lr6230b18f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (13 pp, sha256 687b257fa41f8681, retrieved 2026-11-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF