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S-LMUN5311DW1T1G
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LRC Digital Transistors, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+42@@ -0,0 +1,42 @@+# S-LMUN5311DW1T1G++**LRC** · Digital Transistors · SOT-363++S-LMUN5311DW1T1G from LRC, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | E2 | power_in | Emitter of PNP transistor Q2, connected to positive supply voltage for Q2 operation and complementary output. |+| 2 | B2 | input | Base of PNP transistor Q2, input terminal with integrated base bias resistor (10 kΩ for LMUN5311DW1T1G) for Q2 control. |+| 3 | C1 | output | Collector of NPN transistor Q1, output terminal with maximum collector-emitter voltage of 50 Vdc and collector current of 100 mAdc. |+| 4 | E1 | power_in | Emitter of NPN transistor Q1, ground reference terminal providing return current path for Q1. |+| 5 | B1 | input | Base of NPN transistor Q1, input terminal with integrated base bias resistor (10 kΩ for LMUN5311DW1T1G) for Q1 control. |+| 6 | C2 | output | Collector of PNP transistor Q2, output terminal with maximum collector-emitter voltage of 50 Vdc and collector current of 100 mAdc. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | LRC |+| Package | SOT-363 |+| Category | Transistors/Thyristors |+| Pins | 6 |++## CAD (KiCad official)++- Symbol: `S-LMUN5311DW1T1G`+- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`+- 3D model: SOT-363 (KiCad packages3D, STEP)+- 3D model files: `s-lmun5311dw1t1g-etched.step` / `s-lmun5311dw1t1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `s-lmun5311dw1t1g.step` / `s-lmun5311dw1t1g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906577227497472) (29 pp, sha256 `baae4620958e523b`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/s-lmun5311dw1t1g-datasheet.pdf)
page.jsonadded+132@@ -0,0 +1,132 @@+{+ "slug": "s-lmun5311dw1t1g",+ "version": "0.1.0",+ "type": "component",+ "description": "LRC Digital Transistors, SOT-363. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "transistors-thyristors",+ "s-lmun5311dw1t1g",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "s-lmun5311dw1t1g.kicad_sym",+ "s-lmun5311dw1t1g.kicad_mod",+ "s-lmun5311dw1t1g.glb",+ "s-lmun5311dw1t1g.step",+ "s-lmun5311dw1t1g.lbr",+ "docs/hero.png",+ "docs/s-lmun5311dw1t1g-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "S-LMUN5311DW1T1G",+ "manufacturer": "LRC",+ "package": "SOT-363",+ "pin_count": 6,+ "category": "Transistors/Thyristors",+ "subcategory": "Digital Transistors",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906577227497472",+ "parts": {+ "symbol": "s-lmun5311dw1t1g.kicad_sym",+ "footprint": "s-lmun5311dw1t1g.kicad_mod",+ "model_3d": "s-lmun5311dw1t1g-etched.glb",+ "model_3d_plain": "s-lmun5311dw1t1g.glb",+ "model_3d_step": "s-lmun5311dw1t1g-etched.step",+ "model_3d_step_plain": "s-lmun5311dw1t1g.step",+ "lbr": "s-lmun5311dw1t1g.lbr"+ },+ "distributor_links": {+ "lcsc": "C559098"+ },+ "pins": [+ {+ "number": "1",+ "name": "E2",+ "type": "power_in",+ "description": "Emitter of PNP transistor Q2, connected to positive supply voltage for Q2 operation and complementary output."+ },+ {+ "number": "2",+ "name": "B2",+ "type": "input",+ "description": "Base of PNP transistor Q2, input terminal with integrated base bias resistor (10 kΩ for LMUN5311DW1T1G) for Q2 control."+ },+ {+ "number": "3",+ "name": "C1",+ "type": "output",+ "description": "Collector of NPN transistor Q1, output terminal with maximum collector-emitter voltage of 50 Vdc and collector current of 100 mAdc."+ },+ {+ "number": "4",+ "name": "E1",+ "type": "power_in",+ "description": "Emitter of NPN transistor Q1, ground reference terminal providing return current path for Q1."+ },+ {+ "number": "5",+ "name": "B1",+ "type": "input",+ "description": "Base of NPN transistor Q1, input terminal with integrated base bias resistor (10 kΩ for LMUN5311DW1T1G) for Q1 control."+ },+ {+ "number": "6",+ "name": "C2",+ "type": "output",+ "description": "Collector of PNP transistor Q2, output terminal with maximum collector-emitter voltage of 50 Vdc and collector current of 100 mAdc."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Transistor type assignments (which device is NPN vs PNP) are inferred from typical SOT-363 complemen",+ "2/6 pins cited to the wrong page (name found elsewhere): ['3:C1@p29', '5:B1@p29']"+ ],+ "pages_sent": 29,+ "cost_usd": 0.305,+ "at": "2026-09-22T10:48:21"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588906577227497472",+ "pages": 29,+ "sha256": "baae4620958e523b",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}