S-LDTB113ZLT1G

{
  "slug": "s-ldtb113zlt1g",
  "version": "0.1.0",
  "type": "component",
  "description": "LRC Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "transistors-thyristors",
    "s-ldtb113zlt1g",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "s-ldtb113zlt1g.kicad_sym",
    "s-ldtb113zlt1g.kicad_mod",
    "s-ldtb113zlt1g.glb",
    "s-ldtb113zlt1g.step",
    "s-ldtb113zlt1g.lbr",
    "docs/hero.png",
    "docs/s-ldtb113zlt1g-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "s-ldtb113zlt1g-hero.glb",
    "s-ldtb113zlt1g-hero.overlay.json",
    "s-ldtb113zlt1g-etched.glb"
  ],
  "component": {
    "mpn": "S-LDTB113ZLT1G",
    "manufacturer": "LRC",
    "package": "SOT-23",
    "pin_count": 3,
    "category": "Transistors/Thyristors",
    "subcategory": "Digital Transistors",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590921458548236288",
    "parts": {
      "symbol": "s-ldtb113zlt1g.kicad_sym",
      "footprint": "s-ldtb113zlt1g.kicad_mod",
      "model_3d": "s-ldtb113zlt1g-hero.glb",
      "model_3d_plain": "s-ldtb113zlt1g-etched.glb",
      "model_3d_step": "s-ldtb113zlt1g-etched.step",
      "model_3d_step_plain": "s-ldtb113zlt1g.step",
      "lbr": "s-ldtb113zlt1g.lbr"
    },
    "distributor_links": {
      "lcsc": "C22381723"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T03:43:04Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "BASE",
        "type": "input",
        "description": "Input terminal of the bias resistor transistor, with built-in bias resistor R1 = 1 kΩ and R2 = 10 kΩ per the device marking table, and input voltage limited to −10 V to +5 V (absolute maximum ratings)."
      },
      {
        "number": "2",
        "name": "EMITTER",
        "type": "passive",
        "description": "Emitter terminal of the PNP transistor; the datasheet gives no separate emitter-specific rating beyond the absolute maximum ratings."
      },
      {
        "number": "3",
        "name": "COLLECTOR",
        "type": "passive",
        "description": "Collector terminal of the PNP transistor (output side of the inverter), with supply voltage VCC rated at −50 V maximum and output current IC rated at −500 mA maximum."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin 1/2/3 assignment (BASE/EMITTER/COLLECTOR) is taken from the pinout block on page 1 for the SOT-2; Pin types are KiCad ERC classes inferred from the transistor/inverter function: BASE set as input, E; The datasheet does not give pin-specific electrical limits for EMITTER; the description reflects tha"
        ],
        "pages_sent": 4,
        "cost_usd": 0.0187,
        "at": "2026-10-18T03:40:56"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590921458548236288",
        "pages": 4,
        "sha256": "6b721ebc93dc81f2",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 3,
        "described": 3,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
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        "file": "s-ldtb113zlt1g.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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          3.0,
          1.2
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "dd5d1711204e1d8d26cd11490923bd84340820baa69538c385a4300ec2539bc0",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "s-ldtb113zlt1g-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "76880c4a446fcef0454f6263169be795929ca1b87dd8882a1bd06a61f9c82e9e",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}