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Ray Publish 0.1.0 5416383 7d ago

S-LBZX84C5V6LT1G

LRC · Zener Diodes · SOT-23

S-LBZX84C5V6LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Anode passive Anode terminal of the Zener diode in the SOT-23 package, per the pinout 1-Anode.
2 No Connection unconnected Pin 2 is listed as No Connection in the datasheet pinout and is not used as a circuit terminal.
3 Cathode passive Cathode terminal of the Zener diode in the SOT-23 package, per the pinout 3-Cathode.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Diodes
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Zener voltage (VZ1 min) VZ1 5.2 5.6 6 V @ IZT1 = 5 mA; pulse test, TA = 25°C (Note 3) 2
Zener voltage (VZ2 min/max) VZ2 4.8 6 V @ IZT2 = 1 mA; pulse test, TA = 25°C (Note 3) 2
Zener voltage (VZ3 min/max) VZ3 5.2 6.3 V @ IZT3 = 20 mA; pulse test, TA = 25°C (Note 3) 2
Max reverse leakage current IR 1 µA @ VR = 2 V 2
Forward voltage VF 0.9 V @ IF = 10 mA 2
Zener voltage temperature coefficient VZ -2 2.5 mV/k @ IZT1 = 5 mA, as printed 2
Zener dynamic impedance ZZT1 ZZT1 40 Ω @ IZT1 = 5 mA; printed without min/max label 2
Zener dynamic impedance ZZT2 ZZT2 400 Ω @ IZT2 = 1 mA; printed without min/max label 2
Zener dynamic impedance ZZT3 ZZT3 10 Ω @ IZT3 = 20 mA; printed without min/max label 2
Typical capacitance C 200 pF @ VR = 0, f = 1 MHz; printed without min/max label 2
Total device dissipation, FR-5 board PD 225 mW TA = 25°C; FR-5 board (Note 1) 1
Derate above 25°C, FR-5 board 1.8 mW/°C derate above TA = 25°C; FR-5 board (Note 1) 1
Thermal resistance junction to ambient, FR-5 board θJA 556 °C/W FR-5 board (Note 1) 1
Total device dissipation, alumina substrate PD 300 mW alumina substrate (Note 2), TA = 25°C 1
Derate above 25°C, alumina substrate 2.4 mW/°C derate above TA = 25°C; alumina substrate (Note 2) 1
Thermal resistance junction to ambient, alumina substrate θJA 417 °C/W alumina substrate (Note 2) 1
Junction and storage temperature TJ, Tstg -55 150 °C 1

CAD (KiCad official)

  • Symbol: S-LBZX84C5V6LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: s-lbzx84c5v6lt1g-etched.step / s-lbzx84c5v6lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); s-lbzx84c5v6lt1g.step / s-lbzx84c5v6lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 b90ba094c94d24f4, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF