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Ray Publish 0.1.0 98d0b3f 9d ago

S-LBZX84C2V7LT1G

LRC · Zener Diodes · SOT-23

S-LBZX84C2V7LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Anode passive Anode of the zener diode, which the datasheet pinout places at pin 1; forward voltage is specified at 0.90 V max at IF = 10 mA.
2 No Connection unconnected Pin 2 is not connected internally and is listed as No Connection in the datasheet pinout.
3 Cathode passive Cathode of the zener diode, which the datasheet pinout places at pin 3; for the LBZX84C2V7 type, maximum reverse leakage is 20 µA at VR = 1 V.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Diodes
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Zener voltage at IZT1 (min/max) VZ1 2.5 2.7 2.9 V @ IZT1 = 5 mA (pulse test, TA = 25°C, Note 3) 2
Zener dynamic impedance at IZT1 ZZT1 100 Ω @ IZT1 = 5 mA 2
Zener voltage at IZT2 (low-current) VZ2 1.9 2.4 V @ IZT2 = 1 mA 2
Zener dynamic impedance at IZT2 ZZT2 600 Ω @ IZT2 = 1 mA 2
Zener voltage at IZT3 VZ3 3 3.6 V @ IZT3 = 20 mA 2
Zener dynamic impedance at IZT3 ZZT3 50 Ω @ IZT3 = 20 mA 2
Max reverse leakage current IR 20 µA @ VR = 1 V 2
Capacitance C 450 pF @ VR = 0, f = 1 MHz 2
Forward voltage VF 0.9 V @ IF = 10 mA 2
Total device dissipation, FR-5 board PD 225 mW TA = 25°C (FR-5 board, Note 1) 1
Derating above 25°C, FR-5 board 1.8 mW/°C above TA = 25°C (FR-5 board, Note 1) 1
Thermal resistance junction to ambient, FR-5 board RθJA 556 °C/W FR-5 board (Note 1) 1
Total device dissipation, alumina substrate PD 300 mW Alumina substrate (Note 2), TA = 25°C 1
Derating above 25°C, alumina substrate 2.4 mW/°C above TA = 25°C, alumina substrate (Note 2) 1
Thermal resistance junction to ambient, alumina substrate RθJA 417 °C/W Alumina substrate (Note 2) 1
Junction and storage temperature range TJ, Tstg -55 150 °C 1

CAD (KiCad official)

  • Symbol: S-LBZX84C2V7LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: s-lbzx84c2v7lt1g-etched.step / s-lbzx84c2v7lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); s-lbzx84c2v7lt1g.step / s-lbzx84c2v7lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (6 pp, sha256 974ba6d0d0828e7b, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF