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S-L8550HQLT1G

LRC · Bipolar (BJT) · SOT-23

S-L8550HQLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE passive Base terminal of the PNP transistor; the datasheet rates emitter-base voltage VEBO at -5 V, and emitter-base breakdown V(BR)EBO is -5 V minimum at IE = -100 µA.
2 EMITTER passive Emitter terminal of the PNP transistor; the datasheet rates collector-emitter voltage VCEO at -25 V and collector current IC at -1500 mA.
3 COLLECTOR passive Collector terminal of the PNP transistor; the datasheet gives collector-base breakdown V(BR)CBO of -40 V minimum and collector-emitter saturation VCE(sat) of -0.5 V maximum at IC = -800 mA, IB = -80 mA.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Collector-Emitter Breakdown Voltage V(BR)CEO -25 V IC =-1.0mA 2
Emitter-Base Breakdown Voltage V(BR)EBO -5 V IE = -100µA 2
Collector-Base Breakdown Voltage V(BR)CBO -40 V IC = -100µA 2
Collector Cutoff Current ICBO -150 nA VCB = -35 V 2
Emitter Cutoff Current IEBO -150 nA VEB = -4V 2
Collector-Emitter cutoff Current ICEO -10 μA VCE -25V, IB=0 2
DC Current Gain HFE 150 300 IC =-100mA, VCE =-1V 2
Collector-Emitter Saturation Voltage VCE(S) -0.5 V IC =-800mA, IB =-80mA 2
Collector-Emitter Voltage VCEO -25 V Ta = 25ºC 1
Emitter-Base Voltage VEBO -5 V Ta = 25ºC 1
Collector Current IC -1500 mA Ta = 25ºC 1
Total Device Dissipation FR-5 Board PD 225 mW FR-5 Board (Note 1) @ TA = 25ºC 1
Thermal Resistance, Junction-to-Ambient, FR-5 Board RΘJA 556 ℃/W FR-5 Board (Note 1) 1
Total Device Dissipation Alumina Substrate PD 300 mW Alumina Substrate (Note 2) @ TA = 25ºC 1
Thermal Resistance, Junction-to-Ambient, Alumina Substrate RΘJA 417 ℃/W Alumina Substrate (Note 2) 1
Junction and Storage Temperature TJ,Tstg -55 150 ℃ 1

CAD (KiCad official)

  • Symbol: S-L8550HQLT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: s-l8550hqlt1g-etched.step / s-l8550hqlt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); s-l8550hqlt1g.step / s-l8550hqlt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (6 pp, sha256 e17f572b60c5ce23, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF