component
S-8211CAZ-M5T1G
Public Made by Adomby adom
ABLIC Battery Management, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownS-8211CAZ-M5T1G
ABLIC · Battery Management · SOT-23-5
S-8211CAZ-M5T1G from ABLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VM | input | Voltage detection pin between VM and VSS (overcurrent / charger detection pin); absolute maximum input voltage VDD-28 V to VDD+0.3 V. |
| 2 | VDD | power_in | Positive power supply input; operating voltage between VDD and VSS is 1.5 V to 8 V. |
| 3 | VSS | power_in | Negative power supply input (ground reference). |
| 4 | DO | output | Connection pin of discharge control FET gate (CMOS output); output voltage range VSS-0.3 V to VDD+0.3 V. |
| 5 | CO | output | Connection pin of charge control FET gate (CMOS output); absolute maximum rating up to 28 V range, VVM-0.3 V to VDD+0.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ABLIC |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage between VDD and VSS | VDS | -0.3 | 12 | V | VSS-0.3 to VSS+12, Ta = 25°C | 9 | |
| VM pin input voltage | VVM | -28 | 0.3 | V | VDD-28 to VDD+0.3, relative to VDD | 9 | |
| DO pin output voltage | VDO | -0.3 | 0.3 | V | VSS-0.3 to VDD+0.3 | 9 | |
| CO pin output voltage | VCO | -0.3 | 0.3 | V | VVM-0.3 to VDD+0.3 | 9 | |
| Power dissipation SOT-23-5 (not mounted) | PD | 250 | mW | When not mounted on board | 9 | ||
| Power dissipation SOT-23-5 (mounted) | PD | 600 | mW | When mounted on board, JEDEC STANDARD51-7, 114.3 mm x 76.2 mm x t1.6 mm | 9 | ||
| Operation ambient temperature | Topr | -40 | 85 | °C | 9 | ||
| Storage temperature | Tstg | -55 | 125 | °C | 9 | ||
| Operation voltage between VDD and VSS | VDSOP1 | 1.5 | 8 | V | 10 | ||
| Operation voltage between VDD and VM | VDSOP2 | 1.5 | 28 | V | 10 | ||
| Overcharge detection voltage accuracy | VCU | -0.025 | 0.025 | V | Offset from VCU, Ta = 25°C | 10 | |
| Overcharge detection voltage accuracy | VCU | -0.03 | 0.03 | V | Offset from VCU, Ta = 5°C to 55°C | 10 | |
| Overcharge release voltage accuracy | VCL | -0.05 | 0.05 | V | Offset from VCL, VCL ≠ VCU, Ta = 25°C | 10 | |
| Overcharge release voltage accuracy | VCL | -0.025 | 0.025 | V | Offset from VCL, VCL = VCU, Ta = 25°C | 10 | |
| Overdischarge detection voltage accuracy | VDL | -0.05 | 0.05 | V | Offset from VDL, Ta = 25°C | 10 | |
| Overdischarge release voltage accuracy | VDU | -0.1 | 0.1 | V | Offset from VDU, VDU ≠ VDL, Ta = 25°C | 10 | |
| Overdischarge release voltage accuracy | VDU | -0.05 | 0.05 | V | Offset from VDU, VDU = VDL, Ta = 25°C | 10 | |
| Discharge overcurrent detection voltage accuracy | VDIOV | -0.015 | 0.015 | V | Offset from VDIOV, Ta = 25°C | 10 | |
| Load short-circuiting detection voltage | VSHORT | 0.3 | 0.5 | 0.7 | V | Ta = 25°C | 10 |
| Charge overcurrent detection voltage | VCIOV | -0.13 | -0.1 | -0.07 | V | Ta = 25°C | 10 |
| 0 V battery charge starting charger voltage | V0CHA | 1.2 | V | 0 V battery charge function "available", Ta = 25°C | 10 | ||
| 0 V battery charge inhibition battery voltage | V0INH | 0.5 | V | 0 V battery charge function "unavailable", Ta = 25°C | 10 | ||
| Resistance between VM and VDD | RVMD | 100 | 300 | 900 | kΩ | VDD = 1.8 V, VVM = 0 V, Ta = 25°C | 10 |
| Resistance between VM and VSS | RVMS | 10 | 20 | 40 | kΩ | VDD = 3.5 V, VVM = 1.0 V, Ta = 25°C | 10 |
| Current consumption during operation | IOPE | 1 | 3 | 5.5 | µA | VDD = 3.5 V, VVM = 0 V, Ta = 25°C | 10 |
| Current consumption during power-down | IPDN | 0.2 | µA | VDD = VVM = 1.5 V, with power-down function, Ta = 25°C | 10 | ||
| Current consumption during overdischarge | IOPED | 0.3 | 2 | 3.5 | µA | VDD = VVM = 1.5 V, without power-down function, Ta = 25°C | 10 |
| CO pin resistance H | RCOH | 2.5 | 5 | 10 | kΩ | VCO = 3.0 V, VDD = 3.5 V, VVM = 0 V, Ta = 25°C | 10 |
| CO pin resistance L | RCOL | 2.5 | 5 | 10 | kΩ | VCO = 0.5 V, VDD = 4.5 V, VVM = 0 V, Ta = 25°C | 10 |
| DO pin resistance H | RDOH | 2.5 | 5 | 10 | kΩ | VDO = 3.0 V, VDD = 3.5 V, VVM = 0 V, Ta = 25°C | 10 |
| DO pin resistance L | RDOL | 2.5 | 5 | 10 | kΩ | VDO = 0.5 V, VDD = VVM = 1.8 V, Ta = 25°C | 10 |
| Load short-circuiting detection voltage | VSHORT | 0.16 | 0.5 | 0.84 | V | Ta = -40°C to 85°C (guaranteed by design) | 11 |
| Charge overcurrent detection voltage | VCIOV | -0.14 | -0.1 | -0.06 | V | Ta = -40°C to 85°C (guaranteed by design) | 11 |
| 0 V battery charge starting charger voltage | V0CHA | 1.7 | V | 0 V battery charge function "available", Ta = -40°C to 85°C | 11 | ||
| 0 V battery charge inhibition battery voltage | V0INH | 0.3 | V | 0 V battery charge function "unavailable", Ta = -40°C to 85°C | 11 | ||
| Resistance between VM and VDD | RVMD | 78 | 300 | 1310 | kΩ | VDD = 1.8 V, VVM = 0 V, Ta = -40°C to 85°C | 11 |
| Resistance between VM and VSS | RVMS | 7.2 | 20 | 44 | kΩ | VDD = 3.5 V, VVM = 1.0 V, Ta = -40°C to 85°C | 11 |
| Current consumption during operation | IOPE | 0.7 | 3 | 6 | µA | VDD = 3.5 V, VVM = 0 V, Ta = -40°C to 85°C | 11 |
| Current consumption during power-down | IPDN | 0.3 | µA | VDD = VVM = 1.5 V, with power-down function, Ta = -40°C to 85°C | 11 | ||
| Current consumption during overdischarge | IOPED | 0.2 | 2 | 3.8 | µA | VDD = VVM = 1.5 V, without power-down function, Ta = -40°C to 85°C | 11 |
| CO pin resistance H | RCOH | 1.2 | 5 | 15 | kΩ | VCO = 3.0 V, VDD = 3.5 V, VVM = 0 V, Ta = -40°C to 85°C | 11 |
| CO pin resistance L | RCOL | 1.2 | 5 | 15 | kΩ | VCO = 0.5 V, VDD = 4.5 V, VVM = 0 V, Ta = -40°C to 85°C | 11 |
| DO pin resistance H | RDOH | 1.2 | 5 | 15 | kΩ | VDO = 3.0 V, VDD = 3.5 V, VVM = 0 V, Ta = -40°C to 85°C | 11 |
| DO pin resistance L | RDOL | 1.2 | 5 | 15 | kΩ | VDO = 0.5 V, VDD = VVM = 1.8 V, Ta = -40°C to 85°C | 11 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Lead-free, Sn 100%, halogen-freeP *1. Overcharge release voltage = Overcharge detection voltage Overcharge hysteresis voltage | 1 |
CAD (KiCad official)
- Symbol:
S-8211CAZ-M5T1G - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
s-8211caz-m5t1g-etched.step/s-8211caz-m5t1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);s-8211caz-m5t1g.step/s-8211caz-m5t1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ABLIC datasheet (43 pp, sha256
55f4fdbf9c05e537, retrieved 2026-10-31, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).