component
S-1206B33-U3T1U
Public Made by Adomby adom
ABLIC Linear Voltage Regulators (LDO), SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownS-1206B33-U3T1U
ABLIC · Linear Voltage Regulators (LDO) · SOT-89-3
S-1206B33-U3T1U from ABLIC, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | GND pin; all absolute maximum voltage ratings are referenced to VSS, with VIN limited to VSS − 0.3 to VSS + 7 V. |
| 2 | VIN | power_in | Input voltage pin, with an absolute maximum rating of VSS − 0.3 to VSS + 7 V. |
| 3 | VOUT | power_out | Output voltage pin, with an absolute maximum rating of VSS − 0.3 to VIN + 0.3 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ABLIC |
| Package | SOT-89-3 |
| Category | Power Management ICs |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output current | IOUT | 250 | mA | VIN ≥ VOUT(S) + 1.0 V, 1.5 V ≤ VOUT(S); footnote *5: may not be met due to package power dissipation | 7 | ||
| Input voltage | VIN | 1.7 | 6.5 | V | 7 | ||
| Line regulation | 0.05 | 0.2 | %/V | VOUT(S) + 0.5 V ≤ VIN ≤ 6.5 V, IOUT = 1 μA | 7 | ||
| Load regulation | ΔVOUT2 | 20 | 40 | mV | VIN = VOUT(S) + 1.0 V, 1 μA ≤ IOUT ≤ 100 mA | 7 | |
| Output voltage temperature coefficient | -120 | 120 | ppm/°C | VIN = VOUT(S) + 1.0 V, IOUT = 30 mA, −40°C ≤ Ta ≤ 85°C | 7 | ||
| Current consumption during operation | ISS1 | 1 | 1.5 | μA | VIN = VOUT(S) + 1.0 V, no load | 7 | |
| Dropout voltage | Vdrop | 0.15 | 0.23 | V | IOUT = 100 mA, 3.0 V ≤ VOUT(S) ≤ 5.2 V | 7 | |
| Short-circuit current | ISHORT | 100 | mA | VIN = VOUT(S) + 1.0 V, VOUT = 0 V, 2.3 V ≤ VOUT ≤ 5.2 V | 7 | ||
| Input voltage (absolute maximum, referenced to VSS) | VIN | -0.3 | 7 | V | VSS − 0.3 to VSS + 7 | 6 | |
| Output voltage (absolute maximum, lower limit referenced to VSS) | VOUT | -0.3 | V | VSS − 0.3 to VIN + 0.3; upper limit depends on VIN | 6 | ||
| Power dissipation SOT-89-3 | PD | 1000 | mW | When mounted on board (JEDEC STANDARD51-7) | 6 | ||
| Operation ambient temperature | Topr | -40 | 85 | °C | 6 | ||
| Storage temperature | Tstg | -40 | 125 | °C | 6 | ||
| Input capacitor | CIN | 0.1 | μF | Recommended value for application | 9 | ||
| Output capacitor | CL | 0.1 | μF | Ceramic capacitor, stable over entire temperature range | 9 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | • Lead-free, Sn 100%, halogen-free*2 *1. Attention should be paid to the power dissipation of the package when the output current is large. | 1 |
CAD (KiCad official)
- Symbol:
S-1206B33-U3T1U - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
s-1206b33-u3t1u-etched.step/s-1206b33-u3t1u-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);s-1206b33-u3t1u.step/s-1206b33-u3t1u.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ABLIC datasheet (35 pp, sha256
9366b0a6573d9b1f, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).