component
s-1167b18-m5t1u
Public Made by Adomby adom
ABLIC Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
README
markdownS-1167B18-M5T1U
ABLIC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
S-1167B18-M5T1U from ABLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage pin. Operating range 2.0 V to 6.5 V (absolute max VSS − 0.3 V to VSS + 7 V). Bypass with a 1.0 µF or greater ceramic capacitor (CIN) to VSS placed as close as possible to this pin. |
| 2 | VSS | power_in | Ground (GND) reference pin. Common return for input and output capacitors; wiring impedance to this pin should be minimized. |
| 3 | ON/OFF | input | Regulator enable pin. B-type (positive logic): 'H' (VSH ≥ 1.5 V) = ON, 'L' (VSL ≤ 0.3 V) = OFF. Input current |
| 4 | NC | unconnected | No connection. Pin is electrically open inside the package; may be left floating or tied to VIN or VSS per the datasheet note. |
| 5 | VOUT | power_out | Regulated output voltage pin. Fixed 1.8 V ±1.0% for S-1167B18; output current up to 150 mA (VIN ≥ VOUT(S) + 1.0 V). Requires a ≥1.0 µF output capacitor (CL) to VSS with ESR ≤ 1.0 Ω for phase compensation/stability. Do not allow VOUT to exceed VIN + 0.3 V (parasitic diode). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ABLIC |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
S-1167B18-M5T1US-1167B18-M5T1UM5T1GS-1167B18-M5T1UI6T2U
CAD (KiCad official)
- Symbol:
S-1167B18-M5T1U - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
s-1167b18-m5t1u-etched.step/s-1167b18-m5t1u-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);s-1167b18-m5t1u.step/s-1167b18-m5t1u.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ABLIC datasheet (None pp, sha256
0df82fa1e45e0b24, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.