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RY6050-18M5R
Public Made by Adomby adom
RYCHIP Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownRY6050-18M5R
RYCHIP · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
RY6050-18M5R from RYCHIP, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage pin for the regulator; the recommended input range is 2 V to 5.5 V. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Enable control (active high): driving EN above 0.9 V turns the regulator on and driving EN below 0.4 V puts it into shutdown mode. |
| 4 | NC | unconnected | Not connected. |
| 5 | OUT | power_out | Output voltage pin for the regulator. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RYCHIP |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Tolerance | VOUT | -2 | 2 | % | 1 | ||
| Input Voltage | VIN | 2 | 5.5 | V | 9 | ||
| Output Current Limit | ICL | 450 | 500 | 550 | mA | VIN=5V, 1.8V<VOUT<3.3V | 9 |
| Output Current | IOUT | 500 | mA | VIN≥VOUT(S)+1.0V | 9 | ||
| Line Regulation | ΔVOUT/(ΔVIN×VOUT) | 0.2 | 0.6 | %/V | VOUT(S)+0.5 V≤VIN≤7V, IOUT=300mA | 9 | |
| Load Regulation | ΔVOUT/VOUT | 0.5 | 2 | % | VIN=VOUT(S)+1.0 V | 9 | |
| Power Supply Rejection Ratio at 10kHz | PSRR | 60 | dB | VOUT=2.5V, IOUT=20mA, f = 10kHz | 9 | ||
| Short-Circuit Current Limit | ISC | 500 | mA | 9 | |||
| High Input Threshold | VENH | 0.9 | V | VEN rising until the output is enabled | 9 | ||
| Low Input Threshold | VENL | 0.4 | V | VEN falling until the output is disabled | 9 | ||
| Input Current at EN pin | IEN | -0.1 | 0.1 | μA | VIN=VEN=VOUT(T)+1V | 9 | |
| Input Current at EN pin (EN grounded) | IEN | -0.1 | 0.1 | μA | VIN=VOUT(T)+1V, VEN=VSS | 9 | |
| VIN voltage (absolute maximum) | VIN | 2 | 6 | V | 7 | ||
| VOUT voltage (absolute maximum) | VOUT | 1 | 5 | V | 7 | ||
| Output Current (absolute maximum) | IOUT | 500 | mA | 7 | |||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 7 | ||
| Maximum Junction Temperature | TJ | 150 | °C | 7 | |||
| Storage Temperature | Tstg | -50 | 85 | °C | 7 | ||
| Lead Temperature (Soldering) | 260 | °C | 10 sec | 7 | |||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 8 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | 8 | ||
| Input Voltage | VIN | 2 | 5.5 | V | 8 | ||
| Output Current | IOUT | 0 | 500 | mA | 8 | ||
| Power Supply Rejection Ratio at 1kHz | PSRR | 70 | dB | VOUT=2.5V, IOUT=20mA, f = 1KHz | 9 | ||
| Thermal Shutdown Temperature | TSD | 155 | °C | TJ rising | 9 | ||
| Thermal Shutdown Hysteresis | ΔTSD | 15 | °C | TJ falling from shutdown | 9 | ||
| Supply Current | ISS1 | 28 | μA | VIN=VOUT(S)+1.0 V | 9 | ||
| Shutdown Current | ISD | 0.1 | μA | VEN=0.3V (Disable) | 9 | ||
| Junction-to-ambient thermal resistance (SOT23-5) | RθJA | 195 | °C/W | JESD 51-7, 4-layer JEDEC board (simulated) | 8 | ||
| Junction-to-case (top) thermal resistance (SOT23-5) | RθJC(top) | 102 | °C/W | SOT23-5 | 8 | ||
| Junction-to-board thermal resistance (SOT23-5) | RθJB | 46 | °C/W | SOT23-5 | 8 | ||
| Junction-to-top characterization parameter (SOT23-5) | ψJT | 8.5 | °C/W | SOT23-5 | 8 | ||
| Junction-to-board characterization parameter (SOT23-5) | ψJB | 45 | °C/W | SOT23-5 | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | 2. The ground connections for CIN and COUT must be back to the IC’s GND pin using as wide and short a copper | 11 |
CAD (KiCad official)
- Symbol:
RY6050-18M5R - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ry6050-18m5r-etched.step/ry6050-18m5r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ry6050-18m5r.step/ry6050-18m5r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RYCHIP datasheet (14 pp, sha256
944e1f94321fbbb9, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).