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RT9610CGQW
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Richtek Tech DC-DC Converters, WDFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRT9610CGQW
Richtek Tech · DC-DC Converters · WDFN-8-EP(2x2)
RT9610CGQW from Richtek Tech, in a WDFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable pin; when low, both UGATE and LGATE are driven low and normal operation is disabled (logic-high min 1.4V, logic-low max 0.48V at VCC = 5V). |
| 2 | PHASE | passive | Switch node connected to the source of the upper MOSFET and the drain of the lower MOSFET, providing the return path for the upper gate driver (DC −0.3V to 32V). |
| 3 | UGATE | output | Upper gate drive output connected to the gate of the high-side power N-MOSFET (2A source/sink at 2.5V). |
| 4 | BOOT | power_in | Floating bootstrap supply pin for the upper gate drive; connect the bootstrap capacitor (not smaller than 0.1µF) between this pin and PHASE. |
| 5 | PWM | input | Tri-state control input for the driver, connected to the controller PWM output (rising threshold 3.8V typ, falling threshold 1V typ at VCC = 5V). |
| 6 | GND | power_in | Ground pin. |
| 7 | LGATE | output | Lower gate drive output connected to the gate of the low-side power N-MOSFET (4A sink at 2.5V). |
| 8 | VCC | power_in | Input supply pin connected to a 5V bias supply (4.5V to 5.5V) with a high quality bypass capacitor to GND. |
| 9 | GND | power_in | Exposed pad, must be soldered to a large PCB area and connected to GND for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | WDFN-8-EP(2x2) |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Shutdown Current | ISHDN | 0 | 5 | µA | VEN = 0V, PWM = 0V, VCC = 5V | 4 | |
| VCC POR Rising | VPORH | 4.2 | 4.5 | V | VCC POR Rising | 4 | |
| VCC POR Falling | VPORL | 3.5 | 3.84 | V | VCC POR Falling | 4 | |
| Internal Boost Switch On Resistance | RBOOT | 80 | Ω | VCC to BOOT, 10mA | 4 | ||
| PWM Tri-State Rising Threshold | VPWMH | 3.5 | 3.8 | 4.1 | V | VCC = 5V | 5 |
| PWM Tri-State Falling Threshold | VPWML | 0.7 | 1 | 1.3 | V | VCC = 5V | 5 |
| EN Input Voltage Logic-High | VENH | 1.4 | V | VCC = 5V | 5 | ||
| EN Input Voltage Logic-Low | VENL | 0.48 | V | VCC = 5V | 5 | ||
| Quiescent Current | IQ | 80 | µA | PWM Pin Floating, VEN = 3.3V | 4 | ||
| VCC POR Hysteresis | VPORHYS | 360 | mV | Hysteresis | 4 | ||
| Input Voltage | VIN | 4.5 | 26 | V | 4 | ||
| Control Voltage | VCC | 4.5 | 5.5 | V | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Supply Voltage | VCC | -0.3 | 6 | V | 4 | ||
| BOOT to PHASE | -0.3 | 6 | V | 4 | |||
| PHASE to GND DC | -0.3 | 32 | V | DC | 4 | ||
| PHASE to GND transient | -8 | 38 | V | < 20ns | 4 | ||
| UGATE to PHASE DC | -0.3 | 6 | V | DC | 4 | ||
| UGATE to PHASE transient | -5 | 7.5 | V | < 20ns | 4 | ||
| LGATE to GND DC | -0.3 | 6 | V | DC | 4 | ||
| LGATE to GND transient | -2.5 | 7.5 | V | < 20ns | 4 | ||
| PWM, EN to GND | -0.3 | 6 | V | 4 | |||
| Power Dissipation | PD | 2.19 | W | TA = 25°C, WDFN-8L 2x2 | 4 | ||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Lead Temperature | 260 | °C | Soldering, 10 sec. | 4 | |||
| Storage Temperature Range | -65 | 150 | °C | 4 | |||
| ESD Susceptibility HBM | 2 | kV | HBM | 4 | |||
| Thermal Resistance Junction to Ambient | θJA | 45.5 | °C/W | WDFN-8L 2x2 | 4 | ||
| Thermal Resistance Junction to Case | θJC | 11.5 | °C/W | WDFN-8L 2x2 | 4 |
CAD (KiCad official)
- Symbol:
RT9610CGQW - Footprint:
Package_DFN_QFN:WDFN-8-1EP_2x2mm_P0.5mm_EP0.8x1.2mm - 3D model: WDFN-8-EP(2x2), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
rt9610cgqw-etched.step/rt9610cgqw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt9610cgqw.step/rt9610cgqw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (12 pp, sha256
b113fb3b2ce6b13d, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).