component
RT9199GSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOP-8-EP. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 8d ago |
| viewers | 8d ago |
| package.json | 8d ago |
| page.json | 8d ago |
| README.md | 8d ago |
| rt9199gsp-etched.glb | 8d ago |
| rt9199gsp-etched.step | 8d ago |
| rt9199gsp-hero.glb | 8d ago |
| rt9199gsp-hero.overlay.json | 8d ago |
| rt9199gsp.glb | 8d ago |
| rt9199gsp.kicad_mod | 8d ago |
| rt9199gsp.kicad_sym | 8d ago |
| rt9199gsp.lbr | 8d ago |
| rt9199gsp.step | 8d ago |
RT9199GSP
Richtek Tech · DC-DC Converters · SOP-8-EP
RT9199GSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage supplying current to the output; connect to a well-decoupled supply with a low-ESR capacitor close to the pin, and keep VIN lower than or equal to VCNTL (recommended 1.4V to 5.5V). |
| 2 | GND | power_in | Common ground. |
| 3 | REFEN | input | Reference voltage input and active-low shutdown control; a divider from VIN sets the regulated output voltage, and pulling the pin below 0.15V shuts the device down (above 0.6V enables). |
| 4 | VOUT | output | Regulator output that is regulated to the REFEN voltage and can sink and source current to terminate the bus resistors; 1000uF Al electrolytic with 10uF ceramic output capacitance is recommended. |
| 5 | NC | unconnected | No connection. |
| 6 | VCNTL | power_in | Supplies the internal control circuitry and gate drive; connect to a 5V bias supply (5V ±5%) with at least 1uF capacitor to GND, and output current capability is proportional to VCNTL. |
| 7 | NC | unconnected | No connection. |
| 8 | NC | unconnected | No connection. |
| 9 | GND | power_in | Exposed pad, common ground; must be soldered to a large PCB ground area for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCNTL Operation Current | ICNTL | 1 | 2.5 | mA | IOUT = 0A | 5 | |
| Standby Current (Note 5) | ISTBY | 2 | 90 | A | VREFEN 0.2V (Shutdown), RLOAD = 180 | 5 | |
| Output Offset Voltage (Note 6) | VOS | -10 | 10 | mV | IOUT = 0A | 5 | |
| Load Regulation (Note 7), DDR II | VLOAD | -20 | 20 | mV | VIN = 1.8V, VREFIN = 0.9V, IOUT = 1.8A | 5 | |
| Load Regulation (Note 7), DDR III | VLOAD | -10 | 10 | mV | VIN = 1.5V, VREFIN = 0.75V, IOUT = 1.4A | 5 | |
| Current limit, DDR II | ILIMIT | 2 | 3.5 | A | VIN = 1.8V, VREFIN = 0.9V | 5 | |
| Current limit, DDR III | ILIMIT | 1.5 | 3.5 | A | VIN = 1.5V, VREFIN = 0.75V | 5 | |
| Thermal Shutdown Temperature | TSD | 125 | 170 | °C | VCNTL = 5V | 5 | |
| Shutdown Threshold, Enable | VIH | 0.6 | V | Enable | 5 | ||
| Shutdown Threshold, Shutdown | VIL | 0.15 | V | Shutdown | 5 | ||
| Input Voltage, VIN (recommended) | VIN | 1.4 | 5.5 | V | 5 | ||
| Control Voltage, VCNTL (recommended) | VCNTL | 5 | V | 5 | |||
| Control Voltage, VCNTL tolerance | VCNTL | -5 | 5 | % | Printed as 5V ± 5% | 5 | |
| Junction Temperature Range (recommended) | TJ | -40 | 125 | °C | 5 | ||
| Input Voltage, VIN (absolute maximum) | VIN | 6 | V | 5 | |||
| Control Voltage, VCNTL (absolute maximum) | VCNTL | 6 | V | 5 | |||
| Power Dissipation, SOP-8 (Exposed Pad) | PD | 2.33 | W | TA = 25°C | 5 | ||
| Package Thermal Resistance, SOP-8 (Exposed Pad) junction to ambient | θJA | 42.9 | °C/W | 5 | |||
| Package Thermal Resistance, SOP-8 (Exposed Pad) junction to case | θJC | 12.6 | °C/W | 5 | |||
| Junction Temperature (absolute maximum) | TJ | 125 | °C | 5 | |||
| Lead Temperature (Soldering) | 260 | °C | Soldering, 10 sec. | 5 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 5 | ||
| ESD Susceptibility, HBM | 2 | kV | HBM (Human Body Model) | 5 | |||
| ESD Susceptibility, MM | 200 | V | MM (Machine Model) | 5 |
CAD (KiCad official)
- Symbol:
RT9199GSP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
rt9199gsp-etched.step/rt9199gsp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt9199gsp.step/rt9199gsp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (12 pp, sha256
bb195c43edc34806, retrieved 2026-10-21, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).