component
RT9187CGB
Public Made by Adomby adom
Richtek Tech Linear Voltage Regulators (LDO), SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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RT9187CGB
Richtek Tech · Linear Voltage Regulators (LDO) · SOT-23-5
RT9187CGB from Richtek Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Voltage input with a recommended supply range of 2.5V to 5.5V and a 6V absolute maximum. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Active-high chip enable; a logic-low below 0.6V puts the part into shutdown with standby current of 1µA maximum. |
| 4 | ADJ | input | Output voltage feedback input, where VOUT = VREF x (1 + R1/R2) with VREF typically 0.8V and divider resistors up to 100kΩ. |
| 5 | VOUT | power_out | Regulated voltage output that requires at least a 2.2µF output capacitor for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOT-23-5 |
| Category | Power Supply Chip |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Voltage Tolerance | VREF | 0.784 | 0.8 | 0.816 | V | 3 | |
| ADJ Pin Current | IADJ | 10 | 100 | nA | VADJ = VREF | 3 | |
| Quiescent Current | IQ | 300 | 400 | μA | VEN ≥ VIH, IOUT = 0mA | 3 | |
| Standby Current | ISTBY | 0.1 | 1 | μA | VEN ≤ VIL,VIN = 3.3V | 3 | |
| Current Limit | ILIM | 0.9 | A | RLOAD = 0.5Ω, VIN = 3.3V | 3 | ||
| Dropout Voltage | VDROP | 60 | 100 | mV | IOUT = 0.3A, VOUT = 5V | 3 | |
| Dropout Voltage | VDROP | 100 | 200 | mV | IOUT = 0.5A, VOUT = 5V | 3 | |
| Load Regulation | ΔVLOAD | 0.4 | %/A | VIN = (VOUT + 0.5V), 10mA < IOUT < 0.5A | 3 | ||
| EN Threshold Logic-High Voltage | VIH | 1.8 | V | VIN = 3.3V | 3 | ||
| EN Threshold Logic-Low Voltage | VIL | 0.6 | V | VIN = 3.3V | 3 | ||
| EN Current | IEN | 0.1 | 1 | μA | VIN = 3.3V, Enable | 3 | |
| Power Supply Rejection Rate | PSRR | -60 | dB | f = 100Hz | 3 | ||
| Power Supply Rejection Rate | PSRR | -50 | dB | f = 10kHz | 3 | ||
| Line Regulation | ΔVLINE | 0.3 | % | VIN = (VOUT + 0.5) to 5.5V, IOUT = 1mA | 3 | ||
| Supply Input Voltage (absolute maximum) | 6 | V | 3 | ||||
| EN Input Voltage (absolute maximum) | 6 | V | 3 | ||||
| Power Dissipation | PD | 0.4 | W | TA = 25°C, SOT-23-5 | 3 | ||
| Package Thermal Resistance | θJA | 250 | °C/W | SOT-23-5 | 3 | ||
| Lead Temperature (Soldering, 10 sec.) | 260 | °C | Soldering, 10 sec. | 3 | |||
| Junction Temperature | 150 | °C | 3 | ||||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| ESD Susceptibility HBM | 2 | kV | HBM (Human Body Model) | 3 | |||
| Supply Input Voltage (recommended) | 2.5 | 5.5 | V | 3 | |||
| EN Input Voltage (recommended) | 0 | 5.5 | V | 3 | |||
| Junction Temperature Range | -40 | 125 | °C | 3 | |||
| Ambient Temperature Range | -40 | 85 | °C | 3 |
CAD (KiCad official)
- Symbol:
RT9187CGB - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
rt9187cgb-etched.step/rt9187cgb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt9187cgb.step/rt9187cgb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (8 pp, sha256
af18f1df3e172e01, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# RT9187CGB
**Richtek Tech** · Linear Voltage Regulators (LDO) · SOT-23-5
RT9187CGB from Richtek Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Voltage input with a recommended supply range of 2.5V to 5.5V and a 6V absolute maximum. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Active-high chip enable; a logic-low below 0.6V puts the part into shutdown with standby current of 1µA maximum. |
| 4 | ADJ | input | Output voltage feedback input, where VOUT = VREF x (1 + R1/R2) with VREF typically 0.8V and divider resistors up to 100kΩ. |
| 5 | VOUT | power_out | Regulated voltage output that requires at least a 2.2µF output capacitor for stability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOT-23-5 |
| Category | Power Supply Chip |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Voltage Tolerance | VREF | 0.784 | 0.8 | 0.816 | V | | 3 |
| ADJ Pin Current | IADJ | | 10 | 100 | nA | VADJ = VREF | 3 |
| Quiescent Current | IQ | | 300 | 400 | μA | VEN ≥ VIH, IOUT = 0mA | 3 |
| Standby Current | ISTBY | | 0.1 | 1 | μA | VEN ≤ VIL,VIN = 3.3V | 3 |
| Current Limit | ILIM | 0.9 | | | A | RLOAD = 0.5Ω, VIN = 3.3V | 3 |
| Dropout Voltage | VDROP | | 60 | 100 | mV | IOUT = 0.3A, VOUT = 5V | 3 |
| Dropout Voltage | VDROP | | 100 | 200 | mV | IOUT = 0.5A, VOUT = 5V | 3 |
| Load Regulation | ΔVLOAD | | 0.4 | | %/A | VIN = (VOUT + 0.5V), 10mA < IOUT < 0.5A | 3 |
| EN Threshold Logic-High Voltage | VIH | 1.8 | | | V | VIN = 3.3V | 3 |
| EN Threshold Logic-Low Voltage | VIL | | | 0.6 | V | VIN = 3.3V | 3 |
| EN Current | IEN | | 0.1 | 1 | μA | VIN = 3.3V, Enable | 3 |
| Power Supply Rejection Rate | PSRR | | -60 | | dB | f = 100Hz | 3 |
| Power Supply Rejection Rate | PSRR | | -50 | | dB | f = 10kHz | 3 |
| Line Regulation | ΔVLINE | | | 0.3 | % | VIN = (VOUT + 0.5) to 5.5V, IOUT = 1mA | 3 |
| Supply Input Voltage (absolute maximum) | | | | 6 | V | | 3 |
| EN Input Voltage (absolute maximum) | | | | 6 | V | | 3 |
| Power Dissipation | PD | | | 0.4 | W | TA = 25°C, SOT-23-5 | 3 |
| Package Thermal Resistance | θJA | | 250 | | °C/W | SOT-23-5 | 3 |
| Lead Temperature (Soldering, 10 sec.) | | | | 260 | °C | Soldering, 10 sec. | 3 |
| Junction Temperature | | | | 150 | °C | | 3 |
| Storage Temperature Range | | -65 | | 150 | °C | | 3 |
| ESD Susceptibility HBM | | | | 2 | kV | HBM (Human Body Model) | 3 |
| Supply Input Voltage (recommended) | | 2.5 | | 5.5 | V | | 3 |
| EN Input Voltage (recommended) | | 0 | | 5.5 | V | | 3 |
| Junction Temperature Range | | -40 | | 125 | °C | | 3 |
| Ambient Temperature Range | | -40 | | 85 | °C | | 3 |
## CAD (KiCad official)
- Symbol: `RT9187CGB`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `rt9187cgb-etched.step` / `rt9187cgb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rt9187cgb.step` / `rt9187cgb.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Richtek Tech datasheet](docs/rt9187cgb-datasheet.pdf) (8 pp, sha256 `af18f1df3e172e01`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `off` (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/rt9187cgb-datasheet.pdf)