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RT9045GSP
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Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+49@@ -0,0 +1,49 @@+# RT9045GSP++**Richtek Tech** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8++RT9045GSP from Richtek Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VIN | power_in | Input voltage supplying current to the output pin (1V to 5.5V recommended, absolute max 6V). Must be kept lower or equal to VCNTL. Decouple with a large low-ESR ceramic capacitor (typ. 10µF) placed close to the pin. |+| 2 | GND | power_in | Common ground. Shared with the exposed pad, which must be soldered to a large PCB copper area connected to GND for maximum power dissipation. |+| 3 | REFEN | input | Reference voltage input and active-low shutdown control pin. Two resistors divide VIN on this pin to program the regulated output voltage (V_OUT = V_REFEN). Pulling this pin to ground (V_REFEN < 0.15V) shuts down the device; typical drive uses an open-drain N-MOSFET such as 2N7002. |+| 4 | VOUT | power_out | Regulator output, regulated to the REFEN voltage to terminate the DDR bus resistors. Capable of sinking and sourcing up to 1.8A. Requires typ. 10µF ceramic output capacitance to maintain large-signal transient response. |+| 5 | NC | unconnected | No internal connection. Leave floating or tie to GND. |+| 6 | VCNTL | power_in | Control/bias supply for internal control circuitry and gate drive to the output power MOSFETs (5V ±5%). Output current drive capability is proportional to VCNTL. Decouple with at least 1µF to GND; VIN must be kept ≤ VCNTL. |+| 7 | NC | unconnected | No internal connection. Leave floating or tie to GND. |+| 8 | NC | unconnected | No internal connection. Leave floating or tie to GND. |+| 9 | GND (Exposed Pad) | power_in | Exposed thermal pad on the package underside. Must be soldered to a large PCB copper area connected to GND for proper heat sinking and rated power dissipation (2.51W at TA=25°C, θJA=39.8°C/W). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Richtek Tech |+| Package | SOIC-8 |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `RT9045GSPGSP`+- `RT9045GSPZSP`++## CAD (KiCad official)++- Symbol: `RT9045GSP`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Richtek Tech datasheet](docs/rt9045gsp-datasheet.pdf) (11 pp, sha256 `ecb44d14a5f14751`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/rt9045gsp-datasheet.pdf)
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