← Commit history

pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)

Ray ·3e5a7edf31 ·1mo ago ·parent a4441b7
5 files changed +322−8
package.json+2−1
@@ -24,6 +24,7 @@     "docs/hero.png",     "docs/rt9026gsp-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ] }\ No newline at end of file
pads.jsonadded+302
@@ -0,0 +1,302 @@+{+ "schema": "adom.pads/1",+ "slug": "rt9026gsp",+ "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm",+ "generated_from": {+  "footprint": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353",+  "pins": "page.json:component.pins",+  "overrides": null+ },+ "pin1": {+  "pad": "1",+  "at": [+   -2.475,+   -1.905+  ],+  "corner": "top-left",+  "source": "silk-marker",+  "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353"+ },+ "pad_count": 9,+ "symbol_pins": [+  "1",+  "2",+  "3",+  "4",+  "5",+  "6",+  "7",+  "8",+  "9"+ ],+ "paste_apertures": 4,+ "issues": [],+ "pads": [+  {+   "pad": "1",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "1",+   "name": "GND",+   "type": "power_in",+   "description": "Ground. Shared with pin 9 (exposed pad). The exposed pad must be soldered to a large PCB ground for maximum power dissipation.",+   "is_pin1": true,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "2",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "2",+   "name": "S3",+   "type": "input",+   "description": "Active-low Suspend-to-RAM mode control pin. When low, VTT is turned off and left High-Z while VTTREF remains active. Logic thresholds: VIH ≥ 1.6V, VIL ≤ 0.4V.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "3",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "3",+   "name": "VTTSNS",+   "type": "input",+   "description": "VTT voltage sense input pin. Connect to the plus terminal of the VTT output capacitor for remote sensing of the VTT rail.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "4",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "4",+   "name": "VTTREF",+   "type": "output",+   "description": "Buffered reference output equal to VDDQSNS/2 (e.g. 1.25/0.9/0.75/0.675/0.6 V). 10mA source/sink capability; ±20mV output tolerance; source current limit typ. 40mA.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "5",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "5",+   "name": "VDDQSNS",+   "type": "input",+   "description": "VLDOIN (VDDQ) sense input pin. Divided internally by 2 to set the VTT and VTTREF target voltage. Input current typ. 50µA. Absolute max 3.6V.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "6",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "6",+   "name": "VIN",+   "type": "power_in",+   "description": "Analog input pin to the control loop. Operating range 3.15V to 5.5V; absolute max 6V. UVLO rising threshold ≤ 2.7V with 0.2V hysteresis.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "7",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "7",+   "name": "VLDOIN",+   "type": "power_in",+   "description": "Power supply of the VTT and VTTREF output stage (to power the internal MOSFETs). Operating range 1.2V to 3.3V; absolute max 3.6V.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "8",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "8",+   "name": "VTT",+   "type": "power_out",+   "description": "Output voltage for connection to termination resistors, regulated to VDDQSNS/2. Sink/source up to 3A; ±20mV tolerance under load.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "9",+   "kind": "smd",+   "shape": "rect",+   "at": [+    0.0,+    0.0+   ],+   "rot": 0.0,+   "size": [+    2.29,+    3.0+   ],+   "layers": [],+   "thermal": true,+   "pin": "9",+   "name": "GND",+   "type": "power_in",+   "description": "Exposed thermal pad. Must be soldered to a large PCB ground plane for maximum power dissipation; electrically tied to pin 1 GND.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  }+ ]+}\ No newline at end of file
page.json+16−5
@@ -38,7 +38,7 @@         "number": "2",         "name": "S3",         "type": "input",-        "description": "Active-low Suspend-to-RAM mode control pin. When low, VTT is turned off and left High-Z while VTTREF remains active. Logic thresholds: VIH \u2265 1.6V, VIL \u2264 0.4V."+        "description": "Active-low Suspend-to-RAM mode control pin. When low, VTT is turned off and left High-Z while VTTREF remains active. Logic thresholds: VIH ≥ 1.6V, VIL ≤ 0.4V."       },       {         "number": "3",@@ -50,19 +50,19 @@         "number": "4",         "name": "VTTREF",         "type": "output",-        "description": "Buffered reference output equal to VDDQSNS/2 (e.g. 1.25/0.9/0.75/0.675/0.6 V). 10mA source/sink capability; \u00b120mV output tolerance; source current limit typ. 40mA."+        "description": "Buffered reference output equal to VDDQSNS/2 (e.g. 1.25/0.9/0.75/0.675/0.6 V). 10mA source/sink capability; ±20mV output tolerance; source current limit typ. 40mA."       },       {         "number": "5",         "name": "VDDQSNS",         "type": "input",-        "description": "VLDOIN (VDDQ) sense input pin. Divided internally by 2 to set the VTT and VTTREF target voltage. Input current typ. 50\u00b5A. Absolute max 3.6V."+        "description": "VLDOIN (VDDQ) sense input pin. Divided internally by 2 to set the VTT and VTTREF target voltage. Input current typ. 50µA. Absolute max 3.6V."       },       {         "number": "6",         "name": "VIN",         "type": "power_in",-        "description": "Analog input pin to the control loop. Operating range 3.15V to 5.5V; absolute max 6V. UVLO rising threshold \u2264 2.7V with 0.2V hysteresis."+        "description": "Analog input pin to the control loop. Operating range 3.15V to 5.5V; absolute max 6V. UVLO rising threshold ≤ 2.7V with 0.2V hysteresis."       },       {         "number": "7",@@ -74,7 +74,7 @@         "number": "8",         "name": "VTT",         "type": "power_out",-        "description": "Output voltage for connection to termination resistors, regulated to VDDQSNS/2. Sink/source up to 3A; \u00b120mV tolerance under load."+        "description": "Output voltage for connection to termination resistors, regulated to VDDQSNS/2. Sink/source up to 3A; ±20mV tolerance under load."       },       {         "number": "9",@@ -102,6 +102,17 @@     "viewers": {       "symbol": "viewers/symbol.html",       "footprint": "viewers/footprint.html"+    },+    "pin1": {+      "pad": "1",+      "at": [+        -2.475,+        -1.905+      ],+      "corner": "top-left",+      "source": "silk-marker",+      "derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm@sha256:a7971720bdda0353",+      "mark": "drawn"     }   },   "metadata": {
rt9026gsp.lbr+1−1
@@ -71,7 +71,7 @@   <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>   <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-</package>+<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package> </packages> <symbols> <symbol name="RT9026GSP">
viewers/footprint.html+1−1
@@ -23,7 +23,7 @@ rect.pad.hi{stroke:var(--hi);stroke-width:.15;paint-order:stroke} #tip .td{font-size:11px;color:var(--ink);margin-top:5px;line-height:1.4} </style></head><body> <div class=bar><span class=h>PCB footprint</span><span class=sp></span><button class="lyrtog on" data-lyr="copper"><span class="d" style="background:#e35d5d"></span>Copper</button><button class="lyrtog on" data-lyr="silk"><span class="d" style="background:#e6edf3"></span>Silkscreen</button><button class="lyrtog" data-lyr="fab"><span class="d" style="background:#8b949e"></span>Fab</button><button class="lyrtog" data-lyr="courtyard"><span class="d" style="background:#bc8cff"></span>Courtyard</button></div>-<div class=stage id=stage><svg xmlns='http://www.w3.org/2000/svg' viewBox='-4.100 -3.100 8.200 6.200' style='width:100%;height:100%'><line class='ly-silk' x1='-2.060' y1='-2.560' x2='2.060' y2='-2.560' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='-2.060' y1='-2.465' x2='-2.060' y2='-2.560' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='-2.060' y1='2.560' x2='-2.060' y2='2.465' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='2.060' y1='-2.560' x2='2.060' y2='-2.465' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='2.060' y1='2.465' x2='2.060' y2='2.560' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='2.060' y1='2.560' x2='-2.060' y2='2.560' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-courtyard' x1='-3.700' y1='-2.460' x2='-2.200' y2='-2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-3.700' y1='2.460' x2='-3.700' y2='-2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='-2.700' x2='2.200' y2='-2.700' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='-2.460' x2='-2.200' y2='-2.700' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='2.460' x2='-3.700' y2='2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='2.700' x2='-2.200' y2='2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='-2.700' x2='2.200' y2='-2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='-2.460' x2='3.700' y2='-2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='2.460' x2='2.200' y2='2.700' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='2.700' x2='-2.200' y2='2.700' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='3.700' y1='-2.460' x2='3.700' y2='2.460' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='3.700' y1='2.460' x2='2.200' y2='2.460' stroke='#4ade80' stroke-width='0.050'/><rect class='ly-copper pad' data-num='1' data-name='GND' x='-3.450' y='-2.205' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='-1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>1</text><rect class='ly-copper pad' data-num='2' data-name='S3' x='-3.450' y='-0.935' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='-0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>2</text><rect class='ly-copper pad' data-num='3' data-name='VTTSNS' x='-3.450' y='0.335' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>3</text><rect class='ly-copper pad' data-num='4' data-name='VTTREF' x='-3.450' y='1.605' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>4</text><rect class='ly-copper pad' data-num='5' data-name='VDDQSNS' x='1.500' y='1.605' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='2.475' y='1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>5</text><rect class='ly-copper pad' data-num='6' data-name='VIN' x='1.500' y='0.335' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='2.475' y='0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>6</text><rect class='ly-copper pad' data-num='7' data-name='VLDOIN' x='1.500' y='-0.935' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='2.475' y='-0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>7</text><rect class='ly-copper pad' data-num='8' data-name='VTT' x='1.500' y='-2.205' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='2.475' y='-1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' 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