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RT9018B-18GSP
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Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRT9018B-18GSP
Richtek Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP
RT9018B-18GSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGOOD | output | Power-good open-drain output that needs a 100kΩ pull-up to VOUT and goes high about 1.5ms (typical) after VOUT reaches 90% of its rated value, with 0.4V maximum sink voltage at 10mA. |
| 2 | EN | input | Active-high chip enable; the RT9018B has an internal pull-low so the regulator is off when EN is floating, with logic-high at 1.2V minimum and logic-low at 0.7V maximum (VDD = 5V). |
| 3 | VIN | power_in | Supply input voltage, recommended 1.4V to 5.5V, with a 10µF input capacitor placed as close to the IC as possible. |
| 4 | VDD | power_in | Supply for the control circuitry, 3V to 5.5V recommended and must be greater than VOUT + 1.5V (4.5V to 5.5V when PGOOD is used). |
| 5 | NC | unconnected | No internal connection. |
| 6 | VOUT | power_out | Regulated output voltage, rated up to 3A, with a 10µF or larger ceramic output capacitor recommended. |
| 7 | ADJ | input | Feedback pin: with ADJ grounded the internal resistors set the fixed 1.8V output, and an external divider gives VOUT = 0.8V x (R1 + R2)/R2. |
| 8 | GND | power_in | Ground pin, which must be connected to the exposed pad. |
| 9 | GND | power_in | Exposed thermal pad (listed as pin 9 in the datasheet table) that must be soldered to a large PCB copper area and connected to GND for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage VIN (recommended operating) | VIN | 1.4 | 5.5 | V | 3 | ||
| Control Voltage VDD (recommended operating) | VDD | 3 | 5.5 | V | VDD > VOUT + 1.5V | 3 | |
| Control Voltage with PGOOD VDD (Note 8) | VDD | 4.5 | 5.5 | V | 3 | ||
| Junction Temperature Range (recommended operating) | -40 | 125 | °C | 3 | |||
| Ambient Temperature Range (recommended operating) | -40 | 85 | °C | 3 | |||
| Supply Voltage VIN (absolute maximum) | VIN | 1 | 6 | V | 3 | ||
| Control Voltage VDD (absolute maximum) | VDD | 3 | 6 | V | 3 | ||
| Output Voltage VOUT (absolute maximum) | VOUT | 0.8 | 6 | V | 3 | ||
| Power Dissipation PD (absolute maximum) | PD | 1.33 | W | TA = 25°C, SOP-8 (Exposed Pad) | 3 | ||
| Junction Temperature (absolute maximum) | 150 | °C | 3 | ||||
| Lead Temperature (soldering) | 260 | °C | Soldering, 10 sec. | 3 | |||
| Storage Temperature Range (absolute maximum) | -65 | 150 | °C | 3 | |||
| ESD Susceptibility HBM (absolute maximum) | 2 | kV | HBM (Human Body Model) | 3 | |||
| ESD Susceptibility MM (absolute maximum) | 200 | V | MM (Machine Model) | 3 | |||
| Package Thermal Resistance junction-to-ambient SOP-8 (Exposed Pad) | θJA | 75 | °C/W | Measured at TA = 25°C, JEDEC 51-7 four-layer board, minimum footprint | 3 | ||
| Package Thermal Resistance junction-to-case SOP-8 (Exposed Pad) | θJC | 15 | °C/W | Measured at the exposed pad | 3 | ||
| POR Threshold | 2.4 | 2.7 | 3 | V | 3 | ||
| POR Hysteresis | 0.15 | 0.2 | V | 3 | |||
| Adjustable Pin Threshold | VTH_ADJ | 0.2 | 0.4 | V | IOUT = 1mA | 3 | |
| Reference Voltage (ADJ Pin Voltage) | VADJ | 0.788 | 0.8 | 0.812 | V | IOUT = 1mA | 3 |
| Fixed Output Voltage Range | ΔVOUT | -1.5 | 0 | 1.5 | % | 3 | |
| Line Regulation (VIN) | ΔVLINE_IN | 0.2 | 0.6 | % | VIN = VOUT + 0.5V to 5V, IOUT = 1mA | 3 | |
| Load Regulation | ΔVLOAD | 0.2 | 1 | % | VIN = VOUT + 1V, IOUT = 1mA to 3A | 3 | |
| Dropout Voltage (IOUT = 2A) | VDROP | 150 | 250 | mV | IOUT = 2A | 3 | |
| Dropout Voltage (IOUT = 3A) | VDROP | 210 | 350 | mV | IOUT = 3A | 3 | |
| Quiescent Current (Note 7) | IQ | 0.6 | 1.2 | mA | VDD = 5.5V | 3 | |
| Current Limit | ILIM | 3.2 | 4.5 | A | 3 | ||
| Short Circuit Current | 0.5 | 1.8 | A | VOUT < 0.2V | 4 | ||
| VDD Shutdown Current (RT9018B) | ISHDN | 1 | μA | VEN = 0V, RT9018B | 4 | ||
| EN Logic-Low Threshold Voltage | VENL | 0.7 | V | VDD = 5V | 4 | ||
| EN Logic-High Threshold Voltage | VENH | 1.2 | V | VDD = 5V | 4 | ||
| PGOOD Rising Threshold | 90 | 93 | % | 4 | |||
| PGOOD Hysteresis | 3 | 10 | % | 4 | |||
| PGOOD Sink Capability | 0.2 | 0.4 | V | IPGOOD = 10mA | 4 | ||
| PGOOD Delay | 0.5 | 1.5 | 5 | ms | 4 | ||
| Thermal Shutdown Temperature | TSD | 160 | °C | 4 |
CAD (KiCad official)
- Symbol:
RT9018B-18GSP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
rt9018b-18gsp-etched.step/rt9018b-18gsp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt9018b-18gsp.step/rt9018b-18gsp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (12 pp, sha256
369694505ffeca08, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).