# RT9018A-25GSP

**Richtek Tech** · Linear Voltage Regulators (LDO) · SOP-8-EP

RT9018A-25GSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PGOOD | output | Power Good open-drain output that goes high about 1.5ms typ after VOUT reaches 90% of its normal value, with a 100kΩ pull-up to VOUT; requires VDD of 4.5V to 5.5V. |
| 2 | EN | input | Chip enable, active-high (logic-high 1.2V min, logic-low 0.7V max at VDD = 5V); internally pulled high on RT9018A and pulled low on RT9018B. |
| 3 | VIN | power_in | Supply input voltage, 1.4V to 5.5V recommended operating range. |
| 4 | VDD | power_in | Supply voltage of the control circuitry, 3V to 5.5V and greater than VOUT + 1.5V. |
| 5 | NC | unconnected | No internal connection. |
| 6 | VOUT | power_out | Regulated output voltage, up to 3A load, with 10µF ceramic output capacitor. |
| 7 | ADJ | input | Sets the output voltage via the internal feedback resistors when grounded; with external resistors VOUT = 0.8V x (R1 + R2)/R2 (reference 0.8V). |
| 8 | GND | power_in | Ground. |
| 9 | GND | power_in | Exposed pad ground; must be soldered to a large PCB copper area connected to GND for maximum power dissipation. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| POR Threshold |  | 2.4 | 2.7 | 3 | V |  | 3 |
| POR Hysteresis |  | 0.15 | 0.2 |  | V |  | 3 |
| Adjustable Pin Threshold | VTH_ADJ |  | 0.2 | 0.4 | V | IOUT = 1mA | 3 |
| Reference Voltage (ADJ Pin Voltage) | VADJ | 0.788 | 0.8 | 0.812 | V | IOUT = 1mA | 3 |
| Fixed Output Voltage Range | ΔVOUT | -1.5 | 0 | 1.5 | % |  | 3 |
| Line Regulation | ΔVLINE_IN |  | 0.2 | 0.6 | % | VIN = VOUT + 0.5V to 5V, IOUT = 1mA | 3 |
| Load Regulation | ΔVLOAD |  | 0.2 | 1 | % | VIN = VOUT + 1V, IOUT = 1mA to 3A | 3 |
| Dropout Voltage | VDROP |  | 150 | 250 | mV | IOUT = 2A | 3 |
| Dropout Voltage | VDROP |  | 210 | 350 | mV | IOUT = 3A | 3 |
| Quiescent Current | IQ |  | 0.6 | 1.2 | mA | VDD = 5.5V | 3 |
| Current Limit | ILIM | 3.2 | 4.5 |  | A |  | 3 |
| Short Circuit Current |  | 0.5 | 1.8 |  | A | VOUT < 0.2V | 4 |
| VDD Shutdown Current RT9018A | ISHDN |  | 10 | 20 | μA | VEN = 0V | 4 |
| EN Logic-Low Threshold Voltage | VENL |  |  | 0.7 | V | VDD = 5V | 4 |
| EN Logic-High Threshold Voltage | VENH | 1.2 |  |  | V | VDD = 5V | 4 |
| PGOOD Rising Threshold |  |  | 90 | 93 | % |  | 4 |
| PGOOD Hysteresis |  | 3 | 10 |  | % |  | 4 |
| PGOOD Sink Capability |  |  | 0.2 | 0.4 | V | IPGOOD = 10mA | 4 |
| PGOOD Delay |  | 0.5 | 1.5 | 5 | ms |  | 4 |
| Supply Voltage | VIN | 1.4 |  | 5.5 | V |  | 3 |
| Control Voltage | VDD | 3 |  | 5.5 | V | VDD > VOUT + 1.5V | 3 |
| Control Voltage with PGOOD | VDD | 4.5 |  | 5.5 | V | Note 8 | 3 |
| Junction Temperature Range | TJ | -40 |  | 125 | °C |  | 3 |
| Ambient Temperature Range | TA | -40 |  | 85 | °C |  | 3 |
| Supply Voltage | VIN | 1 |  | 6 | V |  | 3 |
| Control Voltage | VDD | 3 |  | 6 | V |  | 3 |
| Output Voltage | VOUT | 0.8 |  | 6 | V |  | 3 |
| Power Dissipation | PD |  |  | 1.33 | W | SOP-8 (Exposed Pad), TA = 25°C | 3 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 3 |
| Lead Temperature |  |  |  | 260 | °C | Soldering, 10 sec. | 3 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 3 |
| ESD Susceptibility HBM |  |  |  | 2 | kV | Human Body Mode | 3 |
| ESD Susceptibility MM |  |  |  | 200 | V | Machine Mode | 3 |
| Thermal Resistance Junction to Ambient | θJA |  | 75 |  | °C/W | SOP-8 (Exposed Pad) | 3 |
| Thermal Resistance Junction to Case | θJC |  | 15 |  | °C/W | SOP-8 (Exposed Pad) | 3 |
| In-rush Current |  |  | 0.6 |  | A | COUT = 10μF, Enable Start-up | 4 |
| VOUT Pull Low Resistance |  |  | 150 |  | Ω | VEN = 0V | 4 |
| EN Input Bias Current | IEN |  | 12 |  | μA | VEN = 0V | 4 |
| Thermal Shutdown Temperature | TSD |  | 160 |  | °C |  | 4 |
| Thermal Shutdown Hysteresis | ΔTSD |  | 30 |  | °C |  | 4 |
| Thermal Shutdown Temperature Fold-back |  |  | 110 |  | °C | VOUT < 0.4V | 4 |

## CAD (KiCad official)

- Symbol: `RT9018A-25GSP`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `rt9018a-25gsp-etched.step` / `rt9018a-25gsp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rt9018a-25gsp.step` / `rt9018a-25gsp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Richtek Tech datasheet](docs/rt9018a-25gsp-datasheet.pdf) (12 pp, sha256 `369694505ffeca08`, retrieved 2026-10-22, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/rt9018a-25gsp-datasheet.pdf)