component
RT8296BHZSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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RT8296BHZSP
Richtek Tech · DC-DC Converters · SOP-8-EP
RT8296BHZSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap for the high-side gate driver; connect a 0.1µF or greater ceramic capacitor from BOOT to SW. |
| 2 | VIN | power_in | Input supply voltage, 4.5V to 23V; must be bypassed with a suitably large ceramic capacitor. |
| 3 | SW | output | Switch node; connect this pin to the external L-C filter. |
| 4 | GND | power_in | Ground; connected to the exposed pad, which must be soldered to a large PCB copper area connected to GND for maximum power dissipation. |
| 5 | FB | input | Feedback input connected to the converter output, regulating to 0.8V typ. via an internal divider or an external resistive divider for adjustable output. |
| 6 | COMP | passive | Compensation node for the control loop; connect a series RC network from COMP to GND, with an additional capacitor to GND in some cases. |
| 7 | EN | input | Chip enable (active high); a logic-low forces shutdown with supply current below 3µA, and a 100k pull-up to VIN gives automatic startup. |
| 8 | SS | input | Soft-start control input; a capacitor from SS to GND sets the soft-start period, with 0.1µF giving 13.5ms. |
| 9 | GND | power_in | Exposed thermal pad on the package bottom, to be soldered to a large PCB area connected to GND for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Shutdown Supply Current | IQ(SHDN) | 0.5 | 3 | A | VEN = 0V | 4 | |
| Supply Current | IQ | 0.8 | 1.2 | mA | VEN = 3V, VFB = 0.9V | 4 | |
| Feedback Voltage | VFB | 0.788 | 0.8 | 0.812 | V | 4.5V ≤ VIN ≤ 23V | 4 |
| Error Amplifier Transconductance | GEA | 940 | A/V | IC = ±10A | 4 | ||
| High Side Switch On-Resistance | RDS(ON)1 | 85 | m | 4 | |||
| Low Side Switch On-Resistance | RDS(ON)2 | 85 | m | 4 | |||
| High Side Switch Leakage Current | 0 | 10 | A | VEN = 0V, VSW = 0V | 4 | ||
| Upper Switch Current Limit | 3.6 | 5.1 | 6.6 | A | Min. Duty Cycle, VBOOT-VSW = 4.8V | 4 | |
| COMP to Current Sense Transconductance | GCS | 5.4 | A/V | 4 | |||
| Oscillation Frequency | fOSC1 | 1 | 1.2 | 1.4 | MHz | 4 | |
| Short Circuit Oscillation Frequency | fOSC2 | 270 | kHz | VFB = 0V | 4 | ||
| Maximum Duty Cycle | DMAX | 75 | % | VFB = 0.7V | 5 | ||
| Minimum On-Time | tON | 100 | ns | 5 | |||
| EN Input Voltage Logic-High | VIH | 2.7 | 5.5 | V | 5 | ||
| EN Input Voltage Logic-Low | VIL | 0.4 | V | 5 | |||
| Input Under Voltage Lockout Threshold | VUVLO | 3.8 | 4.2 | 4.5 | V | VIN Rising | 5 |
| Input Under Voltage Lockout Hysteresis | VUVLO | 320 | mV | 5 | |||
| Soft-Start Current | ISS | 6 | A | VSS = 0V | 5 | ||
| Soft-Start Period | tSS | 13.5 | ms | CSS = 0.1F | 5 | ||
| Thermal Shutdown | TSD | 150 | C | 5 | |||
| Supply Input Voltage | VIN | 4.5 | 23 | V | 4 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Supply Input Voltage | VIN | -0.3 | 25 | V | 4 | ||
| Switch Node Voltage | VSW | -0.3 | V | max is VIN + 0.3V | 4 | ||
| Switch Node Voltage, <10ns | VSW | -5 | 25.3 | V | < 10ns | 4 | |
| BOOT Pin Voltage | VBOOT | -0.3 | 31.3 | V | 4 | ||
| BOOT to SW Voltage | VBOOT-VSW | -0.3 | 6 | V | 4 | ||
| Other Pin Input Voltages | -0.3 | 6 | V | 4 | |||
| Power Dissipation SOP-8 (Exposed Pad) | PD | 1.333 | W | TA = 25°C | 4 | ||
| Lead Temperature (Soldering, 10 sec.) | 260 | °C | 10 sec. | 4 | |||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 4 | ||
| ESD Susceptibility HBM | 2 | kV | Human Body Model | 4 | |||
| Thermal Resistance Junction to Ambient SOP-8 (Exposed Pad) | θJA | 75 | °C/W | JEDEC 51-7 four-layer test board, TA = 25°C | 4 | ||
| Thermal Resistance Junction to Case SOP-8 (Exposed Pad) | θJC | 15 | °C/W | Measured at exposed pad | 4 |
CAD (KiCad official)
- Symbol:
RT8296BHZSP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
rt8296bhzsp-etched.step/rt8296bhzsp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt8296bhzsp.step/rt8296bhzsp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (15 pp, sha256
573c468c55065740, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).