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RT8231AGQW

Public Made by Adom

by adom

Richtek Tech DC-DC Converters, WQFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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RT8231AGQW

Richtek Tech · DC-DC Converters · WQFN-20-EP(3x3)

RT8231AGQW from Richtek Tech, in a WQFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VTTGND power_in Power ground for the VTT LDO.
2 VTTSNS input Voltage sense input for the VTT LDO; connect to the terminal of the VTT_LDO output capacitor.
3 GND power_in Exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation.
4 VTTREF output VTTREF buffered reference output.
5 VDDQ input Reference input for VTT and VTTREF.
6 FB input Feedback voltage input; connect to a resistive voltage divider from VDDQ to GND to adjust the output voltage.
7 S3 input VTT LDO enable control input; do not leave this pin floating.
8 S5 input PWM enable control input; do not leave this pin floating.
9 TON input Sets the UGATE on-time through a pull-up resistor connected to VIN.
10 PGOOD output Power good open-drain output; high when the VDDQ output voltage is within the target range.
11 VID input Internal reference voltage setting input.
12 VDD power_in Supply voltage input for the analog supply and LGATE gate driver.
13 CS input Current limit threshold setting input; connect to GND through the voltage setting resistor.
14 PGND power_in Power ground for the low-side MOSFET.
15 LGATE output Low-side gate driver output for VDDQ.
16 PHASE passive Switch node connected to the external inductor for VDDQ; also serves as the current sense comparator input for low-side MOSFET RDS(ON) sensing.
17 UGATE output High-side gate driver output for VDDQ.
18 BOOT power_out Bootstrap supply for the high-side gate driver.
19 VLDOIN power_in Power supply input for the VTT LDO.
20 VTT power_out Power output of the VTT LDO.
21 GND power_in Exposed pad, which must be soldered to a large PCB and connected to GND for maximum power dissipation.

Key specifications

Parameter Value
Manufacturer Richtek Tech
Package WQFN-20-EP(3x3)
Category Power Supply Chip
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 4.5 26 V 6
Control Voltage VDD 4.5 5.5 V 6
Junction Temperature Range -40 125 °C 6
Ambient Temperature Range -40 85 °C 6
Supply Input Voltage, TON to GND -0.3 32 V 6
BOOT to PHASE -0.3 6 V DC 6
BOOT to PHASE -5 7.5 V < 100ns 6
BOOT to GND -0.3 38 V DC 6
BOOT to GND -5 42 V < 100ns 6
PHASE to GND -0.3 32 V DC 6
PHASE to GND -8 38 V < 20ns 6
LGATE to GND -0.3 6 V DC 6
LGATE to GND -2.5 7.5 V < 20ns 6
UGATE to PHASE -0.3 6 V DC 6
UGATE to PHASE -5 7.5 V < 20ns 6
VDD, CS, S3, S5, VTTSNS, VDDQ, VID, VTTREF, VTT, VLDOIN, FB, PGOOD to GND -0.3 6 V 6
PGND, VTTGND to GND -0.3 0.3 V 6
Other Pins -0.3 6.5 V 6
Power Dissipation, PD (WQFN-20L 3x3) PD 3.33 W TA = 25°C 6
Junction Temperature 150 °C 6
Package Thermal Resistance, junction to ambient (WQFN-20L 3x3) θJA 30 °C/W TA = 25°C, four-layer JEDEC 51-7 board 6
Package Thermal Resistance, junction to case (WQFN-20L 3x3) θJC 7.5 °C/W Measured at exposed pad 6
IVLDOIN Standby Current IVLDOIN 0.1 10 μA VS5 = 5V, VS3 = 0, VTT = no load 7
Shutdown Current (VDD) ISHDN 0.1 10 μA VS5 = VS3 = 0V 7
Shutdown Current (TON) ISHDN 0.1 5 μA VS5 = VS3 = 0V 7
Shutdown Current (S5/S3) ISHDN -1 0.1 1 μA VS5 = VS3 = 0V 7
Shutdown Current (VLDOIN) ISHDN 0.1 1 μA VS5 = VS3 = 0V 7
Shutdown Current (VID) ISHDN 0.5 1 μA VS5 = VS3 = 0V 7
FB Error Comparator Threshold VREF VREF -1 0 1 % VREF = 0.675V/0.75V 7
VDDQ Voltage Range 0.675 3.3 V 7
Switch Frequency fSW 320 400 480 kHz RTON = 620k, VIN = 12V, VDDQ = 1.5V, IOUT = 20A (Note 5) 7
Minimum Off-Time 250 400 550 ns 7
CS Pin Source Current 4.5 5 5.5 μA 7
Zero Crossing Threshold 2 10 mV GND to PHASE 7
Current Limit (Positive) 70 80 90 mV GND to PHASE, RCS = 160k 7
Output UV Threshold VUVP 0.4 0.45 0.5 V VFB falling. For both VID is high or low. 7
OVP Threshold VOVP 110 115 120 % With respect to error comparator threshold 7
VDD POR Threshold 3.9 4.2 4.5 V Rising edge, hysteresis = 120mV, PWM disabled below this level 7
UGATE Gate Driver Source Resistance RUGATEsr 2.5 5 Ω BOOT - PHASE forced to 5V 7
UGATE Gate Driver Sink Resistance RUGATEsk 1.5 3 Ω BOOT - PHASE forced to 5V 7
LGATE Gate Driver Source Resistance RLGATEsr 2.5 5 Ω DL, high state 8
LGATE Gate Driver Sink Resistance RLGATEsk 0.8 1.6 Ω DL, low state 8
Internal Boost Charging Switch On-Resistance 80 Ω VDD to BOOT, 10mA 8
S3, S5 Input Voltage Logic-High 2 V 8
S3, S5 Input Voltage Logic-Low 0.8 V 8
Logic Input Current -1 0 1 μA S3, S5 = VDD / GND 8
VID Input Threshold Voltage Logic-High 750 mV 8
VID Input Threshold Voltage Logic-Low 300 mV 8
PGOOD Trip Threshold (Falling) 20 15 10 % Measured at FB, with respect to reference, no load. hysteresis = 2% 8
PGOOD Output Low Voltage 0.4 V ISINK = 1mA 8
VTT Output Tolerance VVTTTOL -20 20 mV VDDQ = VLDOIN = 1.2V/1.35V/1.5V/1.8V, /IVTT/ = 0A 8
VTT Output Tolerance VVTTTOL -30 30 mV VDDQ = VLDOIN = 1.2V/1.35V/1.5V/1.8V, /IVTT/ < 1A 8
VTT Output Tolerance VVTTTOL -40 40 mV VDDQ = VLDOIN = 1.2V/1.35V, /IVTT/ < 1.2A 8
VTT Source Current Limit IVTTOCLSRC 1.6 2.6 3.6 A VTT = 0V 8
VTT Sink Current Limit IVTTOCLSNK 1.6 2.6 3.6 A VTT = VDDQ 8
VTT Leakage Current IVTTLK -10 10 μA S5 = 5V, S3 = 0V 8
VTT Discharge Current IDSCHRG 10 30 mA VDDQ = 0V, VTT = 0.5V, S5 = S3 = 0V 8
VDDQ/2, VTTREF Output Voltage Tolerance VVTTREFTOL -15 15 mV VLDOIN = VVDDQ = 1.5V, /IVTTREF/ < 10mA 9
VTTREF Source Current Limit IVTTREFOCL 10 40 80 mA VVTTREF = 0V 9

CAD (KiCad official)

  • Symbol: RT8231AGQW
  • Footprint: Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm
  • 3D model: WQFN-20-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: rt8231agqw-etched.step / rt8231agqw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rt8231agqw.step / rt8231agqw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Richtek Tech datasheet (23 pp, sha256 0a73d12a63781818, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF