component

RT8096CHGJ5

Public Made by Adom

by adom

Richtek Tech DC-DC Converters, TSOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs rt8096chgj5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json rt8096chgj5: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md rt8096chgj5: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
rt8096chgj5-etched.fit.json rt8096chgj5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
rt8096chgj5-etched.glb rt8096chgj5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
rt8096chgj5-etched.step rt8096chgj5: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
rt8096chgj5.glb Publish 0.1.0 · Ray
rt8096chgj5.kicad_mod Publish 0.1.0 · Ray
rt8096chgj5.kicad_sym Publish 0.1.0 · Ray
rt8096chgj5.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
rt8096chgj5.step Publish 0.1.0 · Ray

RT8096CHGJ5

Richtek Tech · DC-DC Converters · TSOT-23-5

RT8096CHGJ5 from Richtek Tech, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EN input Enable Control Input. Logic-high enables the converter; logic-low forces the IC into shutdown mode.
2 GND power_in Power Ground. Return for the internal low-side MOSFET and analog reference; connect directly to the ground plane.
3 LX output Switch Node. Drain of the internal high-side PMOS and low-side NMOS; connect to the external inductor. Absolute LX voltage: -0.3V to VIN+0.3V (-4.5V to 7.5V for <20ns transients).
4 VIN power_in Supply Voltage Input. The RT8096C operates from a 2.5V to 6V input; decouple with a low-ESR MLCC capacitor to GND.
5 FB input Feedback Voltage Input. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. Internal reference VREF = 0.6V ±2%.

Key specifications

Parameter Value
Manufacturer Richtek Tech
Package TSOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • RT8096CHGJ5
  • RT8096CHGJ5HGJ6

CAD (KiCad official)

  • Symbol: RT8096CHGJ5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: TSOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: rt8096chgj5-etched.step / rt8096chgj5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rt8096chgj5.step / rt8096chgj5.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
rt8096chgj5.step 85 KB You want the bare part, or you mark your own boards.
rt8096chgj5-etched.step 2.4 MB You want the part with RT8096CHGJ5 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 570 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Richtek Tech datasheet (16 pp, sha256 03fc98e68967f9f5, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF