component
RT8070ZSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRT8070ZSP
Richtek Tech · DC-DC Converters · SOP-8-EP
RT8070ZSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | passive | Error amplifier compensation point where external compensation elements connect to stabilize the control loop; the current comparator threshold increases with this control voltage. |
| 2 | SS | passive | Soft-start control input; a capacitor from SS to GND sets the soft-start period, with 10nF giving 800µs (typ.). |
| 3 | EN | input | Enable control input; float or connect to logic high to enable, connect to GND to disable (VIH min 1.6V, VIL max 0.4V). |
| 4 | VIN | power_in | Power input supply (2.7V to 5.5V operating); decouple this pin to GND with a capacitor. |
| 5 | LX | output | Internal power MOSFET switches output; connect this pin to the inductor. |
| 6 | RT | passive | Oscillator resistor input; a resistor from this pin to GND sets the switching frequency (200kHz to 2MHz), and floating sets 2MHz internally. |
| 7 | FB | input | Feedback input that receives the feedback voltage from a resistive divider across the output, regulated to 0.8V reference. |
| 8 | PGOOD | output | Power good indicator, an open-drain logic output pulled to ground when the output voltage is not within 12.5% of the regulation point. |
| 9 | GND | power_in | Ground and exposed pad; the exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Feedback Reference Voltage | VREF | 0.784 | 0.8 | 0.816 | V | VIN = 3.3V, TA = 25°C | 4 |
| Shutdown DC Bias Current | 10 | µA | Shutdown | 4 | |||
| Switching Frequency | 0.8 | 1 | 1.2 | MHz | ROSC = 300k | 5 | |
| EN Input Logic-High Voltage | VIH | 1.6 | V | 5 | |||
| EN Input Logic-Low Voltage | VIL | 0.4 | V | 5 | |||
| Switch On-Resistance, High | RDS(ON)_P | 110 | 180 | mΩ | ILX = 0.5A | 5 | |
| Switch On-Resistance, Low | RDS(ON)_N | 70 | 120 | mΩ | ILX = 0.5A | 5 | |
| Peak Current Limit | ILIM | 4.7 | 5.8 | A | 5 | ||
| Supply Input Voltage | VIN | 2.7 | 5.5 | V | 4 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Supply Input Voltage | VIN | -0.3 | 6 | V | 4 | ||
| LX Pin Switch Voltage | -0.3 | V | -0.3V to (VIN + 0.3V) | 4 | |||
| LX Pin Switch Voltage (<10ns) | -5 | 8.5 | V | <10ns | 4 | ||
| Other I/O Pin Voltages | -0.3 | V | -0.3V to (VIN + 0.3V) | 4 | |||
| LX Pin Switch Current | 5 | A | 4 | ||||
| Power Dissipation SOP-8 (Exposed Pad) | PD | 1.333 | W | TA = 25°C | 4 | ||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Lead Temperature | 260 | °C | Soldering, 10 sec. | 4 | |||
| Storage Temperature Range | -65 | 150 | °C | 4 | |||
| ESD Susceptibility HBM | 2 | kV | Human Body Model | 4 | |||
| Thermal Resistance Junction to Ambient SOP-8 (EP) | θJA | 75 | °C/W | JEDEC 51-7 four-layer board, TA = 25°C | 4 | ||
| Thermal Resistance Junction to Case SOP-8 (EP) | θJC | 15 | °C/W | measured at exposed pad | 4 | ||
| Output Voltage Line Regulation | 0.1 | %/V | VIN = 2.7V to 5.5V | 4 | |||
| Output Voltage Load Regulation | 0.25 | % | 0A < ILOAD < 4A | 4 | |||
| Under Voltage Lockout Threshold Rising | 2.4 | V | VIN Rising | 5 | |||
| Under Voltage Lockout Threshold Falling | 2.2 | V | VIN Falling | 5 | |||
| Soft-Start Period | tSS | 800 | µs | CSS = 10nF | 5 |
CAD (KiCad official)
- Symbol:
RT8070ZSP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
rt8070zsp-etched.step/rt8070zsp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt8070zsp.step/rt8070zsp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (12 pp, sha256
3443ee613f6ddc63, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).