# RT8055GQW

**Richtek Tech** · DC-DC Converters · WDFN-10-EP(3x3)

RT8055GQW from Richtek Tech, in a WDFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SHDN/RT | input | Shutdown control or frequency setting input; a resistor to ground sets the switching frequency, and forcing the pin to VDD or GND shuts the device down. |
| 2 | GND | power_in | Signal ground for small-signal and compensation components, connected to PGND at one point. |
| 3 | LX | output | Internal power MOSFET switch output; connect to the inductor. |
| 4 | LX | output | Internal power MOSFET switch output; connect to the inductor. |
| 5 | PGND | power_in | Power ground; connect close to the negative terminal of CIN and COUT. |
| 6 | PVDD | power_in | Power supply input; decouple to PGND with a capacitor. |
| 7 | PVDD | power_in | Power supply input; decouple to PGND with a capacitor. |
| 8 | VDD | power_in | Signal supply input (2.6V to 5.5V), decoupled to GND with a capacitor and generally equal to PVDD. |
| 9 | FB | input | Feedback pin receiving the feedback voltage from a resistive divider across the output; reference is 0.8V typical. |
| 10 | COMP | passive | Error amplifier compensation point; connect external compensation elements to stabilize the control loop. |
| 11 | GND | power_in | Exposed pad; must be soldered to a large PCB area and connected to GND for maximum power dissipation. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | WDFN-10-EP(3x3) |
| Category | Power Management ICs |
| Pins | 11 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VDD | 2.6 |  | 5.5 | V | VDD = 3.3V, TA = 25°C | 4 |
| Feedback Reference Voltage | VREF | 0.784 | 0.8 | 0.816 | V |  | 4 |
| Feedback Leakage Current | IFB |  |  | 0.1 | μA | VFB = 3.3V | 4 |
| DC Bias Current, Active |  |  | 500 |  | μA | Active, VFB = 0.7V, Not Switching | 4 |
| DC Bias Current, Shutdown |  |  |  | 1 | μA | Shutdown | 4 |
| Output Voltage Line Regulation | ΔVLINE |  | 0.1 |  | %/V | VIN = 2.6V to 5.5V | 4 |
| Output Voltage Load Regulation | ΔVLOAD |  | 0.4 |  | % | VIN = 5V, VOUT = 3.3V, IOUT = 0A to 3A | 4 |
| Error Amplifier Transconductance | gm |  | 400 |  | μA/V |  | 4 |
| Current Sense Transresistance | RS |  | 0.4 |  | Ω |  | 4 |
| RT Leakage Current |  |  |  | 1 | μA | SHDN/RT = VIN = 5.5V | 4 |
| Switching Frequency | fSW | 1.44 | 1.8 | 2.16 | MHz | ROSC = 180kΩ | 5 |
| Adjustable Switching Frequency Range |  | 0.3 |  | 2 | MHz |  | 5 |
| Switch On Resistance, High | RDS(ON)_P |  | 100 | 160 | mΩ | ISW = 0.3A | 5 |
| Switch On Resistance, Low | RDS(ON)_N |  | 100 | 170 | mΩ | ISW = 0.3A | 5 |
| Peak Current Limit | ILIM | 3.5 |  |  | A |  | 5 |
| Under Voltage Lockout Threshold, Rising |  | 2.33 | 2.4 | 2.57 | V | VDD Rising @Full Temperature | 5 |
| Under Voltage Lockout Threshold, Falling |  | 1.98 | 2.2 | 2.37 | V | VDD Falling @Full Temperature | 5 |
| Supply Input Voltage |  | 2.6 |  | 5.5 | V |  | 4 |
| Junction Temperature Range | TJ | -40 |  | 125 | °C |  | 4 |
| Ambient Temperature Range | TA | -40 |  | 85 | °C |  | 4 |
| Supply Input Voltage, VDD, PVDD |  | -0.3 |  | 6.5 | V |  | 4 |
| LX Pin Switch Voltage |  | -0.3 |  |  | V | upper limit PVDD + 0.3V | 4 |
| LX Pin Switch Voltage, <10ns |  | -5 |  | 8.5 | V | <10ns | 4 |
| Other I/O Pin Voltages |  | -0.3 |  | 6.5 | V |  | 4 |
| LX Pin Switch Current |  |  |  | 4 | A |  | 4 |
| Power Dissipation, WDFN-10L 3x3 | PD |  |  | 1.667 | W | TA = 25°C | 4 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 4 |
| Lead Temperature |  |  |  | 260 | °C | Soldering, 10 sec. | 4 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 4 |
| ESD Susceptibility, HBM |  |  |  | 2 | kV | HBM (Human Body Model) | 4 |
| Package Thermal Resistance, Junction to Ambient, WDFN-10L 3x3 | θJA |  | 60 |  | °C/W | JEDEC 51-7 four-layer board, TA = 25°C | 4 |
| Package Thermal Resistance, Junction to Case, WDFN-10L 3x3 | θJC |  | 7.8 |  | °C/W | measured at exposed pad | 4 |

## CAD (KiCad official)

- Symbol: `RT8055GQW`
- Footprint: `Package_DFN_QFN:WDFN-10-1EP_3x3mm_P0.5mm_EP1.8x2.5mm`
- 3D model: WDFN-10-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `rt8055gqw-etched.step` / `rt8055gqw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rt8055gqw.step` / `rt8055gqw.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Richtek Tech datasheet](docs/rt8055gqw-datasheet.pdf) (14 pp, sha256 `cc47a1266404232a`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/rt8055gqw-datasheet.pdf)