component
RT7285CGJ6
Public Made by Adomby adom
Richtek Tech DC-DC Converters, TSOT-23-6L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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RT7285CGJ6
Richtek Tech · DC-DC Converters · TSOT-23-6L
RT7285CGJ6 from Richtek Tech, in a TSOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | power_out | Bootstrap supply for the high-side gate driver; connect a 0.1µF ceramic capacitor between BOOT and SW. |
| 2 | GND | power_in | Power ground. |
| 3 | FB | input | Feedback voltage input used to set the output voltage through a resistive divider; the converter regulates VFB to 0.6V. |
| 4 | EN | input | Enable control input: logic-high enables the IC and logic-low disables it; do not leave this high-impedance input unconnected. |
| 5 | VIN | power_in | Power input with a range of 4.3V to 18V; must be bypassed with a suitable large ceramic capacitor at this pin. |
| 6 | SW | output | Switch node; connect to the external L-C filter. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | TSOT-23-6L |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Shutdown Current | ISHDN | 4 | µA | VEN = 0V | 3 | ||
| Current Limit (Valley Current) | ILIM | 1.7 | 2.2 | 2.8 | A | Valley Current | 3 |
| Feedback Threshold Voltage | VFB | 591 | 600 | 609 | mV | 3 | |
| EN Input Threshold Logic-High | VEN_H | 1.5 | V | 3 | |||
| EN Input Threshold Logic-Low | VEN_L | 0.4 | V | 3 | |||
| VIN Under-Voltage Lockout Threshold (VIN Rising) | VUVLO | 3.55 | 3.9 | 4.25 | V | VIN Rising | 3 |
| VOUT Discharge Resistance | RDISCHG | 50 | 100 | Ω | EN = 0V, VOUT = 0.5V | 4 | |
| Output Under-Voltage Trip (UVP Detect) | 70 | 75 | 80 | % | 4 | ||
| Supply Input Voltage | VIN | 4.3 | 18 | V | 3 | ||
| Junction Temperature Range | -40 | 125 | °C | 3 | |||
| Ambient Temperature Range | -40 | 85 | °C | 3 | |||
| VIN to GND | -0.3 | 20 | V | 3 | |||
| SW to GND (transient) | -5 | 25 | V | < 10ns | 3 | ||
| Other Pins to GND | -0.3 | 6 | V | 3 | |||
| Power Dissipation, PD | PD | 0.625 | W | TA = 25°C, SOT-23-6 / TSOT-23-6 | 3 | ||
| Package Thermal Resistance, junction to ambient | θJA | 160 | °C/W | SOT-23-6 / TSOT-23-6, four-layer test board per JEDEC 51-7 | 3 | ||
| Package Thermal Resistance, junction to case | θJC | 15 | °C/W | SOT-23-6 / TSOT-23-6 | 3 | ||
| Lead Temperature | 260 | °C | Soldering, 10 sec | 3 | |||
| Junction Temperature | 150 | °C | 3 | ||||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| ESD Susceptibility, HBM | 2 | kV | HBM (Human Body Model) | 3 |
CAD (KiCad official)
- Symbol:
RT7285CGJ6 - Footprint:
Package_TO_SOT_SMD:TSOT-23-6 - 3D model: TSOT-23-6L (KiCad packages3D, STEP)
- 3D model files:
rt7285cgj6-etched.step/rt7285cgj6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt7285cgj6.step/rt7285cgj6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (15 pp, sha256
99a7fde6bc0253c8, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# RT7285CGJ6
**Richtek Tech** · DC-DC Converters · TSOT-23-6L
RT7285CGJ6 from Richtek Tech, in a TSOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | power_out | Bootstrap supply for the high-side gate driver; connect a 0.1µF ceramic capacitor between BOOT and SW. |
| 2 | GND | power_in | Power ground. |
| 3 | FB | input | Feedback voltage input used to set the output voltage through a resistive divider; the converter regulates VFB to 0.6V. |
| 4 | EN | input | Enable control input: logic-high enables the IC and logic-low disables it; do not leave this high-impedance input unconnected. |
| 5 | VIN | power_in | Power input with a range of 4.3V to 18V; must be bypassed with a suitable large ceramic capacitor at this pin. |
| 6 | SW | output | Switch node; connect to the external L-C filter. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | TSOT-23-6L |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Shutdown Current | ISHDN | | | 4 | µA | VEN = 0V | 3 |
| Current Limit (Valley Current) | ILIM | 1.7 | 2.2 | 2.8 | A | Valley Current | 3 |
| Feedback Threshold Voltage | VFB | 591 | 600 | 609 | mV | | 3 |
| EN Input Threshold Logic-High | VEN_H | 1.5 | | | V | | 3 |
| EN Input Threshold Logic-Low | VEN_L | | | 0.4 | V | | 3 |
| VIN Under-Voltage Lockout Threshold (VIN Rising) | VUVLO | 3.55 | 3.9 | 4.25 | V | VIN Rising | 3 |
| VOUT Discharge Resistance | RDISCHG | | 50 | 100 | Ω | EN = 0V, VOUT = 0.5V | 4 |
| Output Under-Voltage Trip (UVP Detect) | | 70 | 75 | 80 | % | | 4 |
| Supply Input Voltage | VIN | 4.3 | | 18 | V | | 3 |
| Junction Temperature Range | | -40 | | 125 | °C | | 3 |
| Ambient Temperature Range | | -40 | | 85 | °C | | 3 |
| VIN to GND | | -0.3 | | 20 | V | | 3 |
| SW to GND (transient) | | -5 | | 25 | V | < 10ns | 3 |
| Other Pins to GND | | -0.3 | | 6 | V | | 3 |
| Power Dissipation, PD | PD | | | 0.625 | W | TA = 25°C, SOT-23-6 / TSOT-23-6 | 3 |
| Package Thermal Resistance, junction to ambient | θJA | | 160 | | °C/W | SOT-23-6 / TSOT-23-6, four-layer test board per JEDEC 51-7 | 3 |
| Package Thermal Resistance, junction to case | θJC | | 15 | | °C/W | SOT-23-6 / TSOT-23-6 | 3 |
| Lead Temperature | | | | 260 | °C | Soldering, 10 sec | 3 |
| Junction Temperature | | | | 150 | °C | | 3 |
| Storage Temperature Range | | -65 | | 150 | °C | | 3 |
| ESD Susceptibility, HBM | | | | 2 | kV | HBM (Human Body Model) | 3 |
## CAD (KiCad official)
- Symbol: `RT7285CGJ6`
- Footprint: `Package_TO_SOT_SMD:TSOT-23-6`
- 3D model: TSOT-23-6L (KiCad packages3D, STEP)
- 3D model files: `rt7285cgj6-etched.step` / `rt7285cgj6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rt7285cgj6.step` / `rt7285cgj6.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Richtek Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588894474080014336) (15 pp, sha256 `99a7fde6bc0253c8`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/rt7285cgj6-datasheet.pdf)