component
RT7272BGSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
rt7272bgsp: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
9062eb5
22h ago
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{
"schema_version": 1,
"type": "component",
"slug": "rt7272bgsp",
"title": "RT7272BGSP",
"brief": "Richtek Tech DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"pmic",
"rt7272bgsp"
],
"component": {
"mpn": "RT7272BGSP",
"manufacturer": "Richtek Tech",
"package": "SOIC-8-EP",
"pin_count": 9,
"category": "PMIC",
"subcategory": "DC-DC Converters",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/ee1ef0bf9c4c42c8c2b9605761eec2bf.pdf",
"parts": {
"symbol": "rt7272bgsp.kicad_sym",
"footprint": "rt7272bgsp.kicad_mod",
"model_3d": "rt7272bgsp-etched.glb",
"model_3d_plain": "rt7272bgsp.glb",
"model_3d_step": "rt7272bgsp-etched.step",
"model_3d_step_plain": "rt7272bgsp.step",
"lbr": "rt7272bgsp.lbr"
},
"distributor_links": {
"lcsc": "C127866"
},
"pins": [
{
"number": "1",
"name": "SW",
"type": "output",
"description": "Switch Node. Internal high-side/low-side N-MOSFET common drain node. Connect to the external L-C output filter. Absolute maximum -0.3V to (VIN + 0.3V)."
},
{
"number": "2",
"name": "BOOT",
"type": "power_in",
"description": "Bootstrap Supply for the High-Side Gate Driver. Connect a 100nF or greater ceramic capacitor from BOOT to SW. VBOOT - VSW absolute maximum is -0.3V to 6V."
},
{
"number": "3",
"name": "EN",
"type": "input",
"description": "Enable Control Input. Logic-high (VIH ≥ 2V) enables the converter; logic-low (VIL ≤ 0.4V) forces the device into shutdown mode (IQ ≈ 0.5µA). Do not float."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground. Signal and power ground return. Connect together with the exposed pad (pin 9) to a large PCB copper area for maximum thermal dissipation."
},
{
"number": "5",
"name": "FB",
"type": "input",
"description": "Feedback Input. Connect to the converter output through a resistive divider to program the output voltage. Internal reference VREF = 0.8V (typ)."
},
{
"number": "6",
"name": "COMP",
"type": "output",
"description": "Compensation Node. Error amplifier output used to compensate the control loop. Connect a series R-C network from COMP to GND; an additional shunt capacitor to GND may be required in some designs."
},
{
"number": "7",
"name": "RLIM",
"type": "input",
"description": "Current Limit Setting. Connect a resistor from RLIM to GND to program the high-side MOSFET peak current limit (adjustable from 1.9A to 7A per RLIM equation in Note 5)."
},
{
"number": "8",
"name": "VIN",
"type": "power_in",
"description": "Power Input. Supplies the internal regulator and the high-side MOSFET drain. Operating range 4.5V to 36V (absolute max 40V). Bypass with a suitable large ceramic capacitor placed close to the pin."
},
{
"number": "9",
"name": "GND (Exposed Pad)",
"type": "power_in",
"description": "Exposed thermal pad. Must be soldered to a large PCB copper area connected to GND for maximum thermal dissipation. Electrically connected to pin 4 (GND)."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/ee1ef0bf9c4c42c8c2b9605761eec2bf.pdf",
"pages": 15,
"sha256": "cdf11346d1fc1345",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 9,
"described": 9,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm@sha256:5848244c5e72002e",
"mark": "drawn"
},
"models_3d": [
{
"file": "rt7272bgsp.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.9,
4.9,
1.65
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "f1718a42c5ea007e8e2dd672ac39a1bb358ee4849bd53c42e21ce83e0e5df7a9",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "rt7272bgsp-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.9,
4.9,
1.65
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "94288450576efb199ca7a613fe72b0183ac26f3b9492201ccfa485d5a9387b0d",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Richtek Tech",
"Package": "SOIC-8-EP",
"Category": "PMIC",
"Pins": "9"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"rt7272bgsp"
],
"discovery_pitch": "RT7272BGSP (Richtek Tech) component page with datasheet-verified CAD.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"rt7272bgsp.kicad_sym",
"rt7272bgsp.kicad_mod",
"rt7272bgsp.glb",
"rt7272bgsp.step",
"rt7272bgsp-etched.step",
"rt7272bgsp.lbr",
"docs/hero.png",
"docs/rt7272bgsp-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"variants": [
{
"mpn": "RT7272BGSP",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T05:14:40.806Z"
}