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Initial commit: component/rt7257bhzsp

Ray ·fce6b7ad6f ·
2 files changed +82
README.mdadded+48
@@ -0,0 +1,48 @@+# RT7257BHZSP++**Richtek Tech** · DC-DC Converters · SOIC-8-EP++RT7257BHZSP from Richtek Tech, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | power_in | Bootstrap for high-side gate driver. Connect a 0.1μF or greater ceramic capacitor from BOOT to SW. V(BOOT)-V(SW) absolute max 6V. |+| 2 | VIN | power_in | Input supply voltage, 4.5V to 18V (abs max 20V). Must be bypassed with a suitable large ceramic capacitor (e.g. 10μF x2 + 0.1μF). |+| 3 | SW | power_out | Switch node. Connect to an external L-C output filter. Swings between GND and VIN at up to 1.2MHz. High-side RDS(on) 110mΩ, low-side 90mΩ. |+| 4,9 | GND | power_in | Ground. Pin 4 and the exposed pad (pin 9) must both be soldered to a large PCB copper area connected to GND for maximum power dissipation (θJA 75°C/W with exposed pad). |+| 5 | FB | input | Feedback input. Regulates the output via an external resistive voltage divider. Internal reference VREF = 0.8V (±1.5%). |+| 6 | COMP | output | Compensation node for the regulation control loop. Connect a series R-C network from COMP to GND; an optional additional capacitor from COMP to GND may be required in some cases. |+| 7 | EN | input | Enable input. Logic high (VIH ≥ 2.7V) enables the converter; logic low (VIL ≤ 0.4V) puts the device into shutdown (<3μA supply). Tie to VIN via a 100kΩ pull-up for automatic startup. Absolute max 20V. |+| 8 | SS | input | Soft-start control input. Connect a capacitor from SS to GND to set the soft-start period; a 0.1μF cap gives ~13.5ms (ISS = 6μA typ). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Richtek Tech |+| Package | SOIC-8-EP |+| Category | PMIC |+| Pins | 8 |++## Ordering variants++- `RT7257BHZSPHZSP`+- `RT7257BHZSPLZSP`++## CAD (KiCad official)++- Symbol: `RT7257BHZSP`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Richtek Tech datasheet](docs/rt7257bhzsp-datasheet.pdf) (14 pp, sha256 `f9aaf4883cb3a8fc`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/rt7257bhzsp-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "rt7257bhzsp",+  "version": "0.1.0",+  "type": "component",+  "description": "Richtek Tech DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "rt7257bhzsp"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "rt7257bhzsp.kicad_sym",+    "rt7257bhzsp.kicad_mod",+    "rt7257bhzsp.glb",+    "rt7257bhzsp.step",+    "rt7257bhzsp.lbr",+    "docs/hero.png",+    "docs/rt7257bhzsp-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file