component
RT7257BHZSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C27998). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+30−10
page.json+10−8@@ -26,37 +26,39 @@ "model_3d_step": "rt7257bhzsp.step", "lbr": "rt7257bhzsp.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C27998"+ }, "pins": [ { "number": "1", "name": "BOOT", "type": "power_in",- "description": "Bootstrap for high-side gate driver. Connect a 0.1μF or greater ceramic capacitor from BOOT to SW. V(BOOT)-V(SW) absolute max 6V."+ "description": "Bootstrap for high-side gate driver. Connect a 0.1\u03bcF or greater ceramic capacitor from BOOT to SW. V(BOOT)-V(SW) absolute max 6V." }, { "number": "2", "name": "VIN", "type": "power_in",- "description": "Input supply voltage, 4.5V to 18V (abs max 20V). Must be bypassed with a suitable large ceramic capacitor (e.g. 10μF x2 + 0.1μF)."+ "description": "Input supply voltage, 4.5V to 18V (abs max 20V). Must be bypassed with a suitable large ceramic capacitor (e.g. 10\u03bcF x2 + 0.1\u03bcF)." }, { "number": "3", "name": "SW", "type": "power_out",- "description": "Switch node. Connect to an external L-C output filter. Swings between GND and VIN at up to 1.2MHz. High-side RDS(on) 110mΩ, low-side 90mΩ."+ "description": "Switch node. Connect to an external L-C output filter. Swings between GND and VIN at up to 1.2MHz. High-side RDS(on) 110m\u03a9, low-side 90m\u03a9." }, { "number": "4,9", "name": "GND", "type": "power_in",- "description": "Ground. Pin 4 and the exposed pad (pin 9) must both be soldered to a large PCB copper area connected to GND for maximum power dissipation (θJA 75°C/W with exposed pad)."+ "description": "Ground. Pin 4 and the exposed pad (pin 9) must both be soldered to a large PCB copper area connected to GND for maximum power dissipation (\u03b8JA 75\u00b0C/W with exposed pad)." }, { "number": "5", "name": "FB", "type": "input",- "description": "Feedback input. Regulates the output via an external resistive voltage divider. Internal reference VREF = 0.8V (±1.5%)."+ "description": "Feedback input. Regulates the output via an external resistive voltage divider. Internal reference VREF = 0.8V (\u00b11.5%)." }, { "number": "6",@@ -68,13 +70,13 @@ "number": "7", "name": "EN", "type": "input",- "description": "Enable input. Logic high (VIH ≥ 2.7V) enables the converter; logic low (VIL ≤ 0.4V) puts the device into shutdown (<3μA supply). Tie to VIN via a 100kΩ pull-up for automatic startup. Absolute max 20V."+ "description": "Enable input. Logic high (VIH \u2265 2.7V) enables the converter; logic low (VIL \u2264 0.4V) puts the device into shutdown (<3\u03bcA supply). Tie to VIN via a 100k\u03a9 pull-up for automatic startup. Absolute max 20V." }, { "number": "8", "name": "SS", "type": "input",- "description": "Soft-start control input. Connect a capacitor from SS to GND to set the soft-start period; a 0.1μF cap gives ~13.5ms (ISS = 6μA typ)."+ "description": "Soft-start control input. Connect a capacitor from SS to GND to set the soft-start period; a 0.1\u03bcF cap gives ~13.5ms (ISS = 6\u03bcA typ)." } ], "provenance": {
rt7257bhzsp.lbr+20−2@@ -63,6 +63,18 @@ <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/> <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/> <smd name="9" x="0.0000" y="-0.0000" dx="2.2900" dy="3.0000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-2.6000" y="2.4700"/>+ <vertex x="-2.8400" y="2.8000"/>+ <vertex x="-2.3600" y="2.8000"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-0.9750" y="2.4500"/>+ <vertex x="1.9500" y="2.4500"/>+ <vertex x="1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="-2.4500"/>+ <vertex x="-1.9500" y="1.4750"/>+ </polygon> <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/> <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -71,7 +83,7 @@ <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/> <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="RT7257BHZSP">@@ -107,7 +119,13 @@ <connect gate="G$1" pin="EN" pad="7"/> <connect gate="G$1" pin="COMP" pad="6"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="RT7257BHZSP" constant="no"/>+ <attribute name="MANUFACTURER" value="Richtek Tech" constant="no"/>+ <attribute name="LCSC_PN" value="C27998" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>