component
RT7247AHGSP
Public Made by Adomby adom
Richtek Tech DC-DC Converters, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRT7247AHGSP
Richtek Tech · DC-DC Converters · SOP-8-EP
RT7247AHGSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap for high side gate driver; connect a 0.1µF or greater ceramic capacitor from BOOT to SW. |
| 2 | VIN | power_in | Input supply voltage, 4.5V to 18V; must be bypassed with a suitable large ceramic capacitor. |
| 3 | SW | power_out | Switch node; connect this pin to an external L-C filter. |
| 4 | GND | power_in | Ground; pin 4 and the exposed pad (9) are GND, and the exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. |
| 5 | FB | input | Feedback input used to regulate the output to a set value via an external resistive voltage divider (0.8V typ. reference). |
| 6 | COMP | passive | Compensation node; connect a series RC network from COMP to GND, with an additional capacitor from COMP to GND in some cases. |
| 7 | EN | input | Enable input; logic high enables the converter, logic low forces shutdown with supply current under 3µA, and a 100kΩ pull-up to VIN gives automatic startup. |
| 8 | SS | passive | Soft-start control input; a capacitor from SS to GND sets the soft-start period, with 0.1µF giving 13.5ms. |
| 9 | GND | power_in | Exposed pad, ground; must be soldered to a large PCB and connected to GND for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Shutdown Supply Current | 0.5 | 3 | µA | VEN = 0V | 4 | ||
| Supply Current | 0.8 | 1.2 | mA | VEN = 3V, VFB = 0.9V | 4 | ||
| Reference Voltage | VREF | 0.788 | 0.8 | 0.812 | V | 4.5V ≤ VIN ≤ 18V | 4 |
| High Side Switch Leakage Current | 0 | 10 | µA | VEN = 0V, VSW = 0V | 4 | ||
| Oscillation Frequency | fOSC1 | 300 | 340 | 380 | kHz | 4 | |
| EN Input Voltage Logic-High | VIH | 2 | 18 | V | 5 | ||
| EN Input Voltage Logic-Low | VIL | 0.4 | V | 5 | |||
| Input Under Voltage Lockout Threshold | VUVLO | 3.8 | 4.2 | 4.5 | V | VIN Rising | 5 |
| Error Amplifier Transconductance | GEA | 940 | µA/V | ∆IC = ±10µA | 4 | ||
| High Side Switch On-Resistance | RDS(ON)1 | 150 | mΩ | 4 | |||
| Low Side Switch On-Resistance | RDS(ON)2 | 130 | mΩ | 4 | |||
| Upper Switch Current Limit | 4 | A | Min. Duty Cycle, VBOOT − VSW = 4.8V | 4 | |||
| COMP to Current Sense Transconductance | GCS | 3.7 | A/V | 4 | |||
| Short Circuit Oscillation Frequency | fOSC2 | 100 | kHz | VFB = 0V | 4 | ||
| Maximum Duty Cycle | DMAX | 93 | % | VFB = 0.7V | 4 | ||
| Minimum On-Time | tON | 100 | ns | 4 | |||
| Input Under Voltage Lockout Hysteresis | ∆VUVLO | 320 | mV | 5 | |||
| Soft-Start Current | ISS | 6 | µA | VSS = 0V | 5 | ||
| Soft-Start Period | tSS | 13.5 | ms | CSS = 0.1µF | 5 | ||
| Thermal Shutdown | TSD | 150 | °C | 5 | |||
| Supply Input Voltage | VIN | 4.5 | 18 | V | 4 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Supply Input Voltage | VIN | -0.3 | 20 | V | 4 | ||
| Switch Voltage, SW | VSW | -0.3 | 25 | V | -0.3V to (VIN + 0.3V); <10ns: -5V to 25V | 4 | |
| VBOOT − VSW | -0.3 | 6 | V | 4 | |||
| Other Pins Voltage | -0.3 | 20 | V | 4 | |||
| Power Dissipation | PD | 1.333 | W | SOP-8 (Exposed Pad), TA = 25°C | 4 | ||
| Lead Temperature | 260 | °C | Soldering, 10 sec. | 4 | |||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Storage Temperature Range | -65 | 150 | °C | 4 | |||
| ESD Susceptibility HBM | 2 | kV | Human Body Model | 4 | |||
| Package Thermal Resistance, Junction to Ambient | θJA | 75 | °C/W | SOP-8 (Exposed Pad), JEDEC 51-7 four-layer board, TA = 25°C | 4 | ||
| Package Thermal Resistance, Junction to Case | θJC | 15 | °C/W | SOP-8 (Exposed Pad), measured at exposed pad | 4 |
CAD (KiCad official)
- Symbol:
RT7247AHGSP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
rt7247ahgsp-etched.step/rt7247ahgsp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt7247ahgsp.step/rt7247ahgsp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (15 pp, sha256
d768ecef784f37ba, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).