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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs rt6200ge: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json rt6200ge: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 17h ago
README.md rt6200ge: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 19d ago
rt6200ge-etched.fit.json rt6200ge: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
rt6200ge-etched.glb rt6200ge: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
rt6200ge-etched.step rt6200ge: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
rt6200ge.glb Publish 0.1.0 · Ray 1mo ago
rt6200ge.kicad_mod Publish 0.1.0 · Ray 1mo ago
rt6200ge.kicad_sym Publish 0.1.0 · Ray 1mo ago
rt6200ge.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 6 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
rt6200ge.step Publish 0.1.0 · Ray 1mo ago

RT6200GE

Richtek Tech · DC-DC Converters · SOT-23-6

RT6200GE from Richtek Tech, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT power_in Bootstrap supply for the high-side gate driver. A capacitor between PHASE and BOOT forms a floating supply to drive the internal N-MOSFET gate above VIN. Absolute max BOOT voltage is VPHASE + 6V.
2 GND power_in Ground reference for the regulated output voltage. Must be routed carefully - kept out of the D1-to-C1 switching current path to prevent noise injection into the part.
3 FB input Feedback voltage input. An external resistor divider from VOUT to GND, tapped to FB, sets the output voltage against the internal 0.8V reference (VFB typ 0.8V, 0.784-0.816V). Divider values also set loop bandwidth.
4 EN input Enable control input (active high). Turns the converter on above ~1.2V (VIH typ 1.08V) and off below ~0.94V. If left open, an internal 1µA pull-up drives EN high; if pulling to VIN through a resistor, use ≥250kΩ. Absolute max 6V; recommended 0V to 5.5V.
5 VIN power_in Supply voltage input, 4.5V to 36V (absolute max 40V). Bypass VIN to GND with a suitable large ceramic capacitor near the pin to suppress input voltage spikes.
6 PHASE output Switch node - the drain of the internal high-side N-MOSFET and return for the bootstrap capacitor. Connects to the external inductor and catch (Schottky) diode. Absolute max −0.3V to (VIN + 0.3V).

Key specifications

Parameter Value
Manufacturer Richtek Tech
Package SOT-23-6
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • RT6200GE

CAD (KiCad official)

  • Symbol: RT6200GE
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: rt6200ge-etched.step / rt6200ge-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rt6200ge.step / rt6200ge.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
rt6200ge.step 97 KB You want the bare part, or you mark your own boards.
rt6200ge-etched.step 1.9 MB You want the part with RT6200GE already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 452 faces against 117 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Richtek Tech datasheet (12 pp, sha256 badee724273bb8fd, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF