# RT5715GQW

**Richtek Tech** · DC-DC Converters · WDFN-8-EP(2x2)

RT5715GQW from Richtek Tech, in a WDFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Enable control input; logic high enables the device and connecting to GND disables it (VEN rising threshold 1V, falling 0.4V). |
| 2 | PGND | power_in | Power ground, shared with the exposed pad (pin 9), which must be soldered to a large PCB and connected to PGND for maximum power dissipation. |
| 3 | AGND | power_in | Analog ground that should be electrically connected to GND close to the device. |
| 4 | FB | input | Feedback voltage input connected to the midpoint of the external resistive divider; the device regulates FB to a typical 0.45V reference. |
| 5 | VOS | input | Output voltage sense pin for the internal control loop; must be connected to the output. |
| 6 | PGOOD | output | Power good open-drain output pulled low when the output voltage is below regulation limits; can be left floating if not used and may be pulled up to a voltage below 5.5V. |
| 7 | LX | passive | Switch node, the source of the internal high-side power MOSFET and drain of the internal low-side synchronous rectifier MOSFET. |
| 8 | VIN | power_in | Power input supply voltage, 2.5V to 5.5V. |
| 9 | PGND | power_in | Exposed pad, power ground; must be soldered to a large PCB and connected to PGND for maximum power dissipation. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | WDFN-8-EP(2x2) |
| Category | Power Management ICs |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Under-Voltage Lockout Threshold | VUVLO | 2.28 | 2.35 | 2.48 | V | VCC rising | 7 |
| Shutdown Supply Current | ISHDN |  |  | 1 | µA | EN = 0V | 7 |
| Voltage Reference | VREF | 0.4455 | 0.45 | 0.4545 | V |  | 7 |
| Current Limit High-Side | ILIM_H | 2.5 | 3.2 | 4 | A | Peak current | 7 |
| Current Limit Low-Side | ILIM_L | 2 | 2.4 | 2.9 | A | Valley current | 7 |
| Power Good High Threshold | VTH_PGLH | 90 | 95 | 100 | % | VFB rising, PGOOD goes high | 7 |
| Power Good Leakage Current | IPG |  | 0.01 | 0.1 | µA | VPG = 5V | 7 |
| Power Good Low Level Voltage | VPGL |  |  | 0.3 | V | Isink = 500µA | 7 |
| Enable Rising Threshold | VENR | 1 |  |  | V | Rising | 8 |
| Enable Falling Threshold | VENF |  |  | 0.4 | V | Falling | 8 |
| Supply Input Voltage (recommended) | VIN | 2.5 |  | 5.5 | V |  | 7 |
| Junction Temperature Range (recommended) | TJ | -40 |  | 125 | °C |  | 7 |
| Ambient Temperature Range (recommended) | TA | -40 |  | 85 | °C |  | 7 |
| Supply Input Voltage (absolute max) | VIN | -0.3 |  | 6 | V |  | 7 |
| Switch Voltage, LX | LX | -0.3 |  | 6 | V |  | 7 |
| Switch Voltage, LX (transient) | LX | -2.5 |  | 7 | V | < 50ns | 7 |
| Other Pins |  | -0.3 |  | 6 | V |  | 7 |
| Power Dissipation | PD |  |  | 1.538 | W | TA = 25°C, WDFN-8SL 2x2 | 7 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 7 |
| Lead Temperature |  |  |  | 260 | °C | Soldering, 10 sec. | 7 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 7 |
| Thermal Resistance Junction to Ambient | θJA |  | 65 |  | °C/W | WDFN-8SL 2x2 | 7 |
| Thermal Resistance Junction to Case | θJC |  | 8 |  | °C/W | WDFN-8SL 2x2 | 7 |
| Under-Voltage Lockout Hysteresis | VUVLO |  | 400 |  | mV |  | 7 |
| Quiescent Current | IQ |  | 30 |  | µA | Active, VFB = 0.5V, no switching | 7 |
| Power Good High Hysteresis | VTH_PGLH |  | 5 |  | % | VFB falling, PGOOD goes low | 7 |
| Soft-Start Time | tSS |  | 150 |  | µs | 10%VOUT to 90%VOUT | 8 |
| High-Side On-Resistance | RP-MOSFET |  | 100 |  | mΩ |  | 8 |
| Low-Side On-Resistance | RN-MOSFET |  | 80 |  | mΩ |  | 8 |
| Minimum On-Time | tON_MIN |  | 60 |  | ns |  | 8 |
| Minimum Off-Time | tOFF_MIN |  | 90 |  | ns |  | 8 |
| UVP Trip Threshold | VUVP |  | 66 |  | % | Hiccup detect | 8 |
| Thermal Shutdown Temperature |  |  | 150 |  | °C |  | 8 |
| Thermal Shutdown Hysteresis |  |  | 20 |  | °C |  | 8 |
| Switching Frequency | fOSC |  | 2.7 |  | MHz |  | 8 |
| Output Discharge Resistor |  |  | 1 |  | kΩ |  | 8 |

## CAD (KiCad official)

- Symbol: `RT5715GQW`
- Footprint: `Package_DFN_QFN:WDFN-8-1EP_2x2mm_P0.5mm_EP0.8x1.2mm`
- 3D model: WDFN-8-EP(2x2), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `rt5715gqw-etched.step` / `rt5715gqw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rt5715gqw.step` / `rt5715gqw.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Richtek Tech datasheet](docs/rt5715gqw-datasheet.pdf) (19 pp, sha256 `1a0fdad4743b2aeb`, retrieved 2026-10-22, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/rt5715gqw-datasheet.pdf)