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RT5047BGSP

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Richtek Tech DC-DC Converters, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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RT5047BGSP

Richtek Tech · DC-DC Converters · SOP-8-EP

RT5047BGSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LNB power_out LNB output voltage, selectable to 13.3V, 14.3V, 18.3V or 19.3V by the SEL and COMP pins, with a current limit of 550mA (typ.) and an absolute maximum rating of 30V.
2 BOOST power_out Boost converter output and tracking supply to the LNB, which must stay at least 800mV above the LNB voltage per the Application Information (page 3 states 850mV), with an absolute maximum rating of 30V.
3 LX output Switching node of the DC-DC boost converter; the internal NMOS turns off when the peak inductor current reaches the 3A (typ.) cycle-by-cycle limit.
4 VIN power_in Power supply input, with a recommended operating range of 8V to 16V and an absolute maximum rating of 28V; UVLO rising threshold is 7.7V (typ.).
5 EN input LNB output enable logic input, which must be driven high (at least 1.2V) or low (at most 0.4V) and should not be left floating.
6 SEL input LNB output voltage selection logic input, where low selects 13.3V and high selects 18.3V (combined with COMP per Table 1) and logic levels are 1.2V minimum high and 0.4V maximum low.
7 COMP input LNB output voltage compensation logic input that, combined with SEL, selects 13.3V, 14.3V, 18.3V or 19.3V, with logic levels of 1.2V minimum high and 0.4V maximum low.
8 TONE input 22kHz TONE logic input that produces a 700mV peak-to-peak tone on the LNB output for DiSEqC 1.x, with logic levels of 1.2V minimum high and 0.4V maximum low.
9 GND power_in Ground; the exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation.

Key specifications

Parameter Value
Manufacturer Richtek Tech
Package SOP-8-EP
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
LNB Output Accuracy, Load and Line Regulation ERR -3 3 % Relative to selected VLNB target level, ILNB = 0 to 450mA 4
Supply Current (LNB disabled) IIN_OFF 0.3 0.5 mA EN = 0, LNB output disabled 4
Supply Current (LNB enabled, no tone) IIN_ON 10 18 mA EN = 1, VLNB = 18.3V, Tone = 0V 4
Supply Current (LNB enabled, 22kHz tone input) IIN_ON 16 28 mA EN = 1, VLNB = 18.3V, 22kHz TONE Input 4
Boost Switch On Resistance RDS(ON) 150 300 m ILNB = 450mA 4
Switching Frequency fSW 600 700 800 kHz 4
Output Voltage Rise Time tR_LNB 3 10 ms For VLNB = 13.3V18.3V, CLNB = 100nF, ILNB = 450mA 4
Output Voltage Pull-Down Time tF_LNB 3 10 ms For VLNB = 18.3V13.3V, CLNB = 100nF, ILNB = 0mA 4
Load Regulation (VLNB = 13.3V) VOUT_LOAD 38 76 mV VLNB = 13.3V, ILNB = 50mA to 450mA 5
Load Regulation (VLNB = 18.3V) VOUT_LOAD 45 90 mV VLNB = 18.3V, ILNB = 50mA to 450mA 5
Line Regulation (VLNB = 13.3V) VOUT_LINE -10 10 mV VIN = 9 to 14V, VLNB = 13.3V, ILNB = 50mA 5
Line Regulation (VLNB = 18.3V) VOUT_LINE -10 10 mV VIN = 9 to 14V, VLNB = 18.3V, ILNB = 50mA 5
Output Over-Current Limit ILIM_LNB1 500 550 650 mA VLNB = 13.3V/18.3V 5
VIN Turn On Threshold VIN_TH 7.7 8 V VIN rising 5
TONE Frequency fTONE 20 22 24 kHz 5
TONE Amplitude, Peak to Peak VTONE_PP 550 700 900 mVPP ILNB = 50 to 450mA, CLNB = 200nF 5
TONE Duty Cycle DCTONE 40 50 60 % ILNB = 0 to 450mA, CLNB = 570nF 5
TONE Rise Time tRTONE 5 10 15 s ILNB = 0 to 450mA, CLNB = 570nF 5
TONE Fall Time tFTONE 5 10 15 s ILNB = 0 to 450mA, CLNB = 570nF 5
TONE Logic Input High VTONE_H 1.2 V 5
TONE Logic Input Low VTONE_L 0.4 V 5
TONE Input Leakage ITONELKG 5 10 A 5
EN Logic Input High VEN_H 1.2 V 5
EN Logic Input Low VEN_L 0.4 V 5
EN Input Leakage IENLKG 5 10 A 5
SEL Logic Input High VSEL_H 1.2 V 5
SEL Logic Input Low VSEL_L 0.4 V 5
SEL Input Leakage ISELLKG 5 10 A 5
COMP Logic Input High VCOMP_H 1.2 V 5
COMP Logic Input Low VCOMP_L 0.4 V 5
COMP Input Leakage ICOMPLKG 5 10 A 5
Supply Input Voltage (recommended) VIN 8 16 V 4
Ambient Temperature Range (recommended) TA -40 85 C 4
Junction Temperature Range (recommended) TJ -40 125 C 4
Supply Input Voltage, VIN (absolute maximum) VIN -0.3 28 V 4
Output Voltage LNB, LX and BOOST Pins (absolute maximum) VLNB, VLX, VBOOST -0.3 30 V 4
Other Pins to GND (absolute maximum) -0.3 6 V 4
Power Dissipation, SOP-8 (Exposed pad) PD 3.44 W TA = 25C 4
Lead Temperature (Soldering, 10 sec.) 260 C Soldering, 10 sec. 4
Junction Temperature (absolute maximum) TJ 150 C 4
Storage Temperature Range TSTG -65 150 C 4
ESD Susceptibility, HBM 2 kV HBM (Human Body Model) 4
Package Thermal Resistance, junction-to-ambient JA 29 C/W SOP-8 (Exposed pad) 4
Package Thermal Resistance, junction-to-case JC 2 C/W SOP-8 (Exposed pad) 4

CAD (KiCad official)

  • Symbol: RT5047BGSP
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
  • 3D model: SOP-8-EP (KiCad packages3D, STEP)
  • 3D model files: rt5047bgsp-etched.step / rt5047bgsp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rt5047bgsp.step / rt5047bgsp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Richtek Tech datasheet (17 pp, sha256 0578bf1018bc31cc, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF