component
RT4812GJ8F
Public Made by Adomby adom
Richtek Tech DC-DC Converters, TSOT-23-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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RT4812GJ8F
Richtek Tech · DC-DC Converters · TSOT-23-8
RT4812GJ8F from Richtek Tech, in a TSOT-23-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input with a recommended operating range of 1.8V to 5.5V; the input capacitor CIN must be placed as close to the IC as possible. |
| 2 | FB | input | Voltage feedback input; the regulated FB voltage is typically 0.5V (0.495V to 0.505V), with the resistive divider connected between VOUT, FB and GND. |
| 3 | VOUT | power_out | Boost converter output with a 1.8V to 5.5V output voltage range and a 6.2V absolute maximum to GND. |
| 4 | PGND | power_in | Power ground for the boost power stage; the datasheet gives no further limits for this pin. |
| 5 | GND | power_in | Analog ground; the datasheet gives no further limits for this pin. |
| 6 | SW | output | Switching node of the boost converter, rated -0.2V to 6V to GND in the absolute maximum ratings. |
| 7 | EN | input | Enable input (1 = enabled, 0 = disabled) that must not be left floating, with VIL maximum 0.4V and VIH minimum 1.2V. |
| 8 | ILIM | input | Average output current limit control pin (H/L): low selects a minimum 1A limit and high selects a minimum 2.1A limit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | TSOT-23-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 1.8 | 5.5 | V | VIN vs VOUT, 0.2V margin (comparison operators lost in extraction) | 5 | |
| Output Voltage | VOUT | 1.8 | 5.5 | V | VIN vs VOUT, 0.2V margin (comparison operators lost in extraction) | 5 | |
| Under-Voltage Lockout Rising Threshold | UVLO_RISE | 1.5 | 1.65 | 1.8 | V | 5 | |
| Under-Voltage Lockout Falling Threshold | UVLO_Falling | 1.3 | 1.55 | 1.7 | V | 5 | |
| FB Voltage | VFB | 0.495 | 0.5 | 0.505 | V | Force PWM | 5 |
| Regulated DC VOUT Voltage | VOUT | 2 | 4 | % | 1.8 VIN VOUT 0.2V (comparison operators lost in extraction), IOUT = 0mA (PSM) | 5 | |
| Shutdown Current | ISHDN | 0.1 | 1 | μA | EN = 0V | 5 | |
| Average Output Current Limit | ILIM | 1 | A | ILIM = L | 5 | ||
| Average Output Current Limit | ILIM | 2.1 | A | ILIM = H | 5 | ||
| FB Pin Input Leakage | IFB | -1 | 1 | μA | 6 | ||
| Leakage of SW | ISW | 5 | μA | All switch off | 6 | ||
| Line Regulation | VOUT, LINE | -2 | 2 | % | VIN = 2.7V to 4.5V, VOUT = 5V, IOUT = 1500mA | 6 | |
| Load Regulation | VOUT, LOAD | -1.5 | 1.5 | % | CCM, IOUT 2A (operator lost in extraction), VIN = 3.6V, VOUT = 5V | 6 | |
| Output Over Voltage Protection | VOVP | 5.8 | 6 | 6.2 | V | 6 | |
| EN Input Low Voltage | VIL | 0.4 | V | 6 | |||
| EN Input High Voltage | VIH | 1.2 | V | 6 | |||
| EN Sink Current | 0.1 | 1 | μA | 6 | |||
| Input/Output Pin Voltage (VIN, FB, ILIM, EN, SW to GND) | -0.2 | 6 | V | to GND | 5 | ||
| VOUT to GND | 6.2 | V | to GND | 5 | |||
| Power Dissipation | PD | 1.78 | W | TSOT-23-8 (FC), TA = 25C | 5 | ||
| Lead Temperature (Soldering) | 260 | °C | 10 sec. soldering | 5 | |||
| Junction Temperature | TJ | -65 | 150 | °C | 5 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 5 | ||
| ESD Susceptibility HBM | 2 | kV | HBM (Human Body Model) | 5 | |||
| Input Voltage Range | VIN | 1.8 | 5.5 | V | 5 | ||
| Output Voltage Range | VOUT | 1.8 | 5.5 | V | 5 | ||
| Junction Temperature (TJ) Range | TJ | -40 | 125 | °C | 5 | ||
| Ambient Temperature (TA) Range | TA | -40 | 85 | °C | 5 | ||
| Junction-to-Ambient Thermal Resistance | θJA | 56 | C/W | TSOT-23-8 (FC) | 5 | ||
| Junction-to-Case Thermal Resistance | θJC | 28 | C/W | TSOT-23-8 (FC) | 5 |
CAD (KiCad official)
- Symbol:
RT4812GJ8F - Footprint:
Package_TO_SOT_SMD:TSOT-23-8 - 3D model: TSOT-23-8 (KiCad packages3D, STEP)
- 3D model files:
rt4812gj8f-etched.step/rt4812gj8f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt4812gj8f.step/rt4812gj8f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (15 pp, sha256
2ebb84194f552969, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).