component
RT2517BGSP
Public Made by Adomby adom
Richtek Tech Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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RT2517BGSP
Richtek Tech · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP
RT2517BGSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IC | unconnected | Internal connection; leave floating and do not make any connection to this pin. |
| 2 | EN | input | Enable control input: logic high enables the regulator and driving it low puts the device into shutdown; it may be tied to VIN if unused and must not be left floating. |
| 3 | VIN | power_in | Supply voltage input (2.2V to 6V); connect a minimum 10µF ceramic capacitor at this pin. |
| 4 | VIN | power_in | Supply voltage input (2.2V to 6V); connect a minimum 10µF ceramic capacitor at this pin. |
| 5 | VOUT | power_out | Regulated output voltage; a minimum 10µF capacitor should be placed directly at this pin. |
| 6 | VOUT | power_out | Regulated output voltage; a minimum 10µF capacitor should be placed directly at this pin. |
| 7 | ADJ | input | Feedback voltage input for the external resistor divider that sets the output voltage; connecting it directly to VOUT sets the output at 1.2V. |
| 8 | GND | power_in | Ground; must be connected to the exposed pad and the GND plane. |
| 9 | GND | power_in | Exposed thermal pad, listed with pin 8 as GND; it must be soldered to a large PCB copper area connected to GND for maximum power dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | -0.3 | 7 | V | 4 | ||
| Other Pins | -0.3 | 6 | V | 4 | |||
| Power Dissipation, SOP-8 (Exposed Pad) | PD | 2.041 | W | TA = 25°C | 4 | ||
| Lead Temperature (Soldering, 10 sec.) | 260 | °C | 10 sec soldering | 4 | |||
| Junction Temperature | 150 | °C | 4 | ||||
| Storage Temperature Range | -65 | 150 | °C | 4 | |||
| ESD Susceptibility HBM (Human Body Model) | 2 | kV | 4 | ||||
| Package Thermal Resistance, SOP-8 (Exposed Pad) | θJA | 49 | °C/W | TA = 25°C; JEDEC 51-7 four-layer test board | 4 | ||
| Package Thermal Resistance, SOP-8 (Exposed Pad) | θJC | 8 | °C/W | measured at exposed pad | 4 | ||
| Supply Input Voltage | VIN | 2.2 | 6 | V | 4 | ||
| Junction Temperature Range | -40 | 125 | °C | 4 | |||
| Shutdown Supply Current | ISHDN | 1 | 10 | µA | VIN = 3.3V, VEN = 0V | 4 | |
| Quiescent Current | IQ | 0.7 | 1.5 | mA | VIN = 3.3V, IOUT = 0A | 4 | |
| Line Regulation | VLINE | 0.4 | %/V | IOUT = 10mA | 4 | ||
| Load Regulation | VLOAD | 1 | % | IOUT = 10mA to 1A | 4 | ||
| Current Limit | ILIM | 1.05 | 2.8 | A | VIN = 3.3V | 4 | |
| Current Foldback Threshold | VFold | 0.3 | 0.5 | V | VIN = 3.3V | 4 | |
| Dropout Voltage | VDROP | 400 | mV | IOUT = 1A | 4 | ||
| ADJ Reference Voltage | VADJ | 1.176 | 1.2 | 1.224 | V | VIN = 3.3V, VADJ = VOUT, IOUT = 10mA | 4 |
| ADJ Pin Current | IADJ | 400 | nA | VIN = 3.3V | 4 | ||
| EN Input Voltage Logic-High | VIH | 1.6 | V | VIN = 3.3V | 4 | ||
| EN Input Voltage Logic-Low | VIL | 0.4 | V | VIN = 3.3V | 4 | ||
| Enable Pin Current | IEN | 1 | µA | VIN = 6V, VEN = 0V | 4 |
CAD (KiCad official)
- Symbol:
RT2517BGSP - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
rt2517bgsp-etched.step/rt2517bgsp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rt2517bgsp.step/rt2517bgsp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Richtek Tech datasheet (10 pp, sha256
055b839567ad5e59, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# RT2517BGSP
**Richtek Tech** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8-EP
RT2517BGSP from Richtek Tech, in a SOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IC | unconnected | Internal connection; leave floating and do not make any connection to this pin. |
| 2 | EN | input | Enable control input: logic high enables the regulator and driving it low puts the device into shutdown; it may be tied to VIN if unused and must not be left floating. |
| 3 | VIN | power_in | Supply voltage input (2.2V to 6V); connect a minimum 10µF ceramic capacitor at this pin. |
| 4 | VIN | power_in | Supply voltage input (2.2V to 6V); connect a minimum 10µF ceramic capacitor at this pin. |
| 5 | VOUT | power_out | Regulated output voltage; a minimum 10µF capacitor should be placed directly at this pin. |
| 6 | VOUT | power_out | Regulated output voltage; a minimum 10µF capacitor should be placed directly at this pin. |
| 7 | ADJ | input | Feedback voltage input for the external resistor divider that sets the output voltage; connecting it directly to VOUT sets the output at 1.2V. |
| 8 | GND | power_in | Ground; must be connected to the exposed pad and the GND plane. |
| 9 | GND | power_in | Exposed thermal pad, listed with pin 8 as GND; it must be soldered to a large PCB copper area connected to GND for maximum power dissipation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Richtek Tech |
| Package | SOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | -0.3 | | 7 | V | | 4 |
| Other Pins | | -0.3 | | 6 | V | | 4 |
| Power Dissipation, SOP-8 (Exposed Pad) | PD | | | 2.041 | W | TA = 25°C | 4 |
| Lead Temperature (Soldering, 10 sec.) | | | | 260 | °C | 10 sec soldering | 4 |
| Junction Temperature | | | | 150 | °C | | 4 |
| Storage Temperature Range | | -65 | | 150 | °C | | 4 |
| ESD Susceptibility HBM (Human Body Model) | | | | 2 | kV | | 4 |
| Package Thermal Resistance, SOP-8 (Exposed Pad) | θJA | | | 49 | °C/W | TA = 25°C; JEDEC 51-7 four-layer test board | 4 |
| Package Thermal Resistance, SOP-8 (Exposed Pad) | θJC | | | 8 | °C/W | measured at exposed pad | 4 |
| Supply Input Voltage | VIN | 2.2 | | 6 | V | | 4 |
| Junction Temperature Range | | -40 | | 125 | °C | | 4 |
| Shutdown Supply Current | ISHDN | | 1 | 10 | µA | VIN = 3.3V, VEN = 0V | 4 |
| Quiescent Current | IQ | | 0.7 | 1.5 | mA | VIN = 3.3V, IOUT = 0A | 4 |
| Line Regulation | VLINE | | | 0.4 | %/V | IOUT = 10mA | 4 |
| Load Regulation | VLOAD | | | 1 | % | IOUT = 10mA to 1A | 4 |
| Current Limit | ILIM | 1.05 | | 2.8 | A | VIN = 3.3V | 4 |
| Current Foldback Threshold | VFold | 0.3 | | 0.5 | V | VIN = 3.3V | 4 |
| Dropout Voltage | VDROP | | | 400 | mV | IOUT = 1A | 4 |
| ADJ Reference Voltage | VADJ | 1.176 | 1.2 | 1.224 | V | VIN = 3.3V, VADJ = VOUT, IOUT = 10mA | 4 |
| ADJ Pin Current | IADJ | | | 400 | nA | VIN = 3.3V | 4 |
| EN Input Voltage Logic-High | VIH | 1.6 | | | V | VIN = 3.3V | 4 |
| EN Input Voltage Logic-Low | VIL | | | 0.4 | V | VIN = 3.3V | 4 |
| Enable Pin Current | IEN | | | 1 | µA | VIN = 6V, VEN = 0V | 4 |
## CAD (KiCad official)
- Symbol: `RT2517BGSP`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOP-8-EP (KiCad packages3D, STEP)
- 3D model files: `rt2517bgsp-etched.step` / `rt2517bgsp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rt2517bgsp.step` / `rt2517bgsp.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Richtek Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590302163063627776) (10 pp, sha256 `055b839567ad5e59`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/rt2517bgsp-datasheet.pdf)