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RT2101AGQW

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Richtek Tech DC-DC Converters, WQFN-16(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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RT2101AGQW

Richtek Tech · DC-DC Converters · WQFN-16(3x3)

RT2101AGQW from Richtek Tech, in a WQFN-16(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power input. Supply range 2.95V to 6V (absolute max −0.3V to 7V). Tie pins 1, 2, and 16 together and bypass to GND with a low-ESR ceramic capacitor.
2 VIN power_in Power input. Supply range 2.95V to 6V. Connect together with pins 1 and 16.
3 GND power_in Power ground. Tie pins 3, 4, and the exposed pad (17) together and to the PCB ground plane for maximum power dissipation.
4 GND power_in Power ground. Tie pins 3, 4, and the exposed pad (17) together and to the PCB ground plane for maximum power dissipation.
5 AGND power_in Analog ground. Reference ground for the analog control circuitry; connect to the PCB ground plane via a quiet return path.
6 FB input Feedback input to the error amplifier. Regulates to the internal 0.827V (typ) reference; output voltage is set by an external R1/R2 divider from VOUT to FB to GND. Adjustable range 0.827V to 3.6V.
7 COMP output Compensation node for converter stability. Connect an external RC network from COMP to AGND to shape the error-amplifier response.
8 RT/SYNC bidirectional Frequency setting and external synchronous clock input. Connect a resistor RRT to GND to set the switching frequency (700kHz to 2MHz; e.g. 180kΩ → ~1MHz, 60kΩ → ~2.2MHz), or drive with an external clock in the 700kHz-2MHz range to synchronize.
9 SS/TR passive Soft-start and tracking. An internal 2.2µA current source charges an external CSS capacitor to set the soft-start ramp; VFB tracks VSS during startup. CSS(nF) = tSS(ms) × 2.2µA / 0.827V.
10 SW power_out Switch node. Connect to external inductor of the L-C output filter. Voltage rating −1V to (VIN + 0.3V) DC, −5V to (VIN + 5V) for <100ns transients. Pins 10, 11, 12 are tied internally and must all connect to the inductor.
11 SW power_out Switch node. Connect to external inductor. Tie pins 10, 11, 12 together.
12 SW power_out Switch node. Connect to external inductor. Tie pins 10, 11, 12 together.
13 BOOT power_in Bootstrap supply for the high-side MOSFET gate driver. Connect a ~0.1µF capacitor between BOOT and SW. BOOT-to-SW absolute max −0.3V to 7V.
14 PGOOD output Power-good indicator, open-drain. High-Z (good) when VFB is between ~93% and ~107% of VREF; pulled low (fault) when VFB falls below ~88% or rises above ~113% of VREF. Requires an external pull-up resistor.
15 EN input Chip enable. Pull high (>1.25V typ rising) to enable, low (<1.18V typ falling) to disable. Internal pull-up current source (~4.9µA at VIH+50mV) enables the chip when the pin is left floating. External resistor divider from VIN can set a custom UVLO.
16 VIN power_in Power input. Tie together with pins 1 and 2 and bypass with a low-ESR ceramic capacitor.
17 GND power_in Exposed thermal pad. Must be soldered to a large PCB ground copper area and connected to GND for maximum power dissipation (θJC = 7.5°C/W, θJA = 30°C/W).

Key specifications

Parameter Value
Manufacturer Richtek Tech
Package WQFN-16(3x3)
Category PMIC
Pins 17

Ordering variants

Same part, different packaging or reel option.

  • RT2101AGQWG

CAD (KiCad official)

  • Symbol: RT2101AGQW
  • Footprint: Package_DFN_QFN:MPS_QFN-16_3x3mm_P0.5mm
  • 3D model: WQFN-16(3x3) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Richtek Tech datasheet (13 pp, sha256 1855bec30799896c, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF