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Contents

README

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RSF60R099W

REASUNOS · MOSFETs · TO-247

RSF60R099W from REASUNOS, in a TO-247. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-to-source voltage is limited to ±20 V, the gate threshold is 2.5 V min to 5 V max, and gate ESD (HBM) is rated 2000 V.
2 D passive Drain; drain-to-source voltage is rated 600 V, with 31 A continuous drain current at TC=25℃ and 93 A pulsed. This pin is also connected to the tab.
3 S passive Source; the integral body diode carries 31 A continuous source current and 93 A maximum pulsed current.

Key specifications

Parameter Value
Manufacturer REASUNOS
Package TO-247
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: RSF60R099W
  • Footprint: Package_TO_SOT_THT:TO-247-3_Vertical
  • 3D model: TO-247 (KiCad packages3D, STEP)
  • 3D model files: rsf60r099w-etched.step / rsf60r099w-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rsf60r099w.step / rsf60r099w.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: REASUNOS datasheet (9 pp, sha256 cfb2110cb5faeabf, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF