component
RS8801HXF5
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Jiangsu RUNIC Tech Gate Drivers, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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RS8801HXF5
Jiangsu RUNIC Tech · Gate Drivers · SOT-23-5
RS8801HXF5 from Jiangsu RUNIC Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply input; the datasheet rates VDD at 4.5V to 18V, and internal UVLO holds OUT low when VDD is below the start threshold (about 4.3V typical). |
| 2 | GND | power_in | Ground pin; all voltages on the device are referenced to GND. |
| 3 | IN+ | input | Non-inverting input for the PWM control signal; in inverting configuration, connect IN+ to VDD to enable the output, and OUT is held low if IN+ is unbiased or floating. |
| 4 | IN- | input | Inverting input for the PWM control signal; in non-inverting configuration, connect IN- to GND to enable the output, and OUT is held low if IN- is unbiased or floating. |
| 5 | OUT | output | Sourcing/sinking current output of the driver, rated for 5A peak source and sink current at VDD = 12V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | SOT-23-5 |
| Category | Motor Driver ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDD | VDD | -0.3 | 22 | V | 7 | ||
| OUT voltage DC | -0.3 | V | DC | 7 | |||
| OUT voltage repetitive pulse | -2 | V | Repetitive pulse less than 200ns | 7 | |||
| Output continuous current (source/sink) | IOUT_DC | 0.4 | A | 7 | |||
| Output pulsed current (source/sink) | IOUT_pulsed | 5 | A | 0.5us | 7 | ||
| Input voltage IN+, IN- | -4 | 22 | V | 7 | |||
| Package thermal impedance | θJA | 280 | °C/W | SOT23-5 | 7 | ||
| Operating virtual junction temperature range | TJ | -40 | 150 | °C | 7 | ||
| Storage temperature range | -65 | 150 | °C | 7 | |||
| Lead temperature (soldering) | 260 | °C | Soldering, 10s | 7 | |||
| Supply voltage range | VDD | 4.5 | 12 | 18 | V | 7 | |
| Operating junction temperature range | -40 | 140 | °C | 7 | |||
| Input voltage IN+, IN- | 0 | 18 | V | 7 | |||
| Startup current IDD(OFF) | IDD(OFF) | 42.5 | μA | VDD=3.4V, IN+=VDD, IN-=GND | 8 | ||
| Startup current IDD(OFF) | IDD(OFF) | 40 | μA | VDD=3.4V, IN+ = IN- = GND | 8 | ||
| Startup current IDD(OFF) | IDD(OFF) | 25 | μA | VDD=3.4V, IN+ = IN- = VDD | 8 | ||
| Startup current IDD(OFF) | IDD(OFF) | 23 | μA | VDD=3.4V, IN+=GND, IN-=VDD | 8 | ||
| Startup current IDD(OFF) | IDD(OFF) | 215 | 270 | 300 | μA | VDD=12V, IN+=VDD, IN-=GND | 8 |
| Startup current IDD(OFF) | IDD(OFF) | 130 | 180 | 200 | μA | VDD=12V, IN+ = IN- = GND | 8 |
| Startup current IDD(OFF) | IDD(OFF) | 80 | 120 | 130 | μA | VDD=12V, IN+ = IN- = VDD | 8 |
| Startup current IDD(OFF) | IDD(OFF) | 80 | 122.5 | 130 | μA | VDD=12V, IN+=GND, IN-=VDD | 8 |
| Supply start threshold | VON | 3.9 | 4.3 | 4.5 | V | TA = 25°C | 8 |
| Minimum operating voltage after supply start | VOFF | 3.45 | 4 | 4.45 | V | 8 | |
| Input signal high threshold | VIN_H | 2.8 | V | Output high for IN+ pin, Output low for IN- pin | 8 | ||
| Input signal low threshold | VIN_L | 1 | V | Output low for IN+ pin, Output high for IN- pin | 8 | ||
| Input pull-down resistance (IN+) | RINP | 150 | 235 | 250 | kΩ | VDD=12V, VINP=4V | 8 |
| Input pull-down resistance (IN-) | RINN | 150 | 210 | 250 | kΩ | 8 | |
| Source/sink peak current | ISRC/SNK | -5 | 5 | A | CLOAD=0.22μF, FSW = 1kHz | 8 | |
| High output voltage (VOD-VOH) | VOD-VOH | 30 | mV | VDD = 12V, IOUT=-10mA | 8 | ||
| High output voltage (VOD-VOH) | VOD-VOH | 35 | mV | VDD = 4.5V, IOUT=-10mA | 8 | ||
| Low output voltage | VOL | 5.05 | mV | VDD = 12V, IOUT=10mA | 8 | ||
| Low output voltage | VOL | 5.15 | mV | VDD = 4.5V, IOUT=10mA | 8 | ||
| Output pullup resistance | ROH | 3 | 4 | Ω | VDD = 12V, IOUT=10mA | 8 | |
| Output pullup resistance | ROH | 3.5 | Ω | VDD = 4.5V, IOUT=10mA | 8 | ||
| Output pulldown resistance | ROL | 0.5 | 0.7 | Ω | VDD = 12V, IOUT=10mA | 8 | |
| Output pulldown resistance | ROL | 0.5 | Ω | VDD = 4.5V, IOUT=10mA | 8 | ||
| Supply voltage hysteresis | VDD_H | 0.3 | V | 8 | |||
| Rise time | tR | 8.5 | ns | VDD = 12V, CLOAD=1.8nF | 8 | ||
| Rise time | tR | 15.5 | ns | VDD = 4.5V, CLOAD=1.8nF | 8 | ||
| Fall time | tF | 7 | ns | VDD = 12V, CLOAD=1.8nF | 8 | ||
| Fall time | tF | 5.5 | ns | VDD = 4.5V, CLOAD=1.8nF | 8 | ||
| IN+ to output propagation delay | tD1 | 11 | ns | VDD=12V, 5V input pulse CLOAD =1.8nF | 8 | ||
| IN+ to output propagation delay | tD1 | 12.5 | ns | VDD=4.5V, 5V input pulse CLOAD =1.8nF | 8 | ||
| IN- to output propagation delay | tD2 | 14 | ns | VDD=12V, 5V input pulse CLOAD =1.8nF | 8 | ||
| IN- to output propagation delay | tD2 | 16 | ns | VDD=4.5V, 5V input pulse CLOAD =1.8nF | 8 |
CAD (KiCad official)
- Symbol:
RS8801HXF5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
rs8801hxf5-etched.step/rs8801hxf5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs8801hxf5.step/rs8801hxf5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu RUNIC Tech datasheet (18 pp, sha256
82da8bdc6f06808f, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# RS8801HXF5
**Jiangsu RUNIC Tech** · Gate Drivers · SOT-23-5
RS8801HXF5 from Jiangsu RUNIC Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply input; the datasheet rates VDD at 4.5V to 18V, and internal UVLO holds OUT low when VDD is below the start threshold (about 4.3V typical). |
| 2 | GND | power_in | Ground pin; all voltages on the device are referenced to GND. |
| 3 | IN+ | input | Non-inverting input for the PWM control signal; in inverting configuration, connect IN+ to VDD to enable the output, and OUT is held low if IN+ is unbiased or floating. |
| 4 | IN- | input | Inverting input for the PWM control signal; in non-inverting configuration, connect IN- to GND to enable the output, and OUT is held low if IN- is unbiased or floating. |
| 5 | OUT | output | Sourcing/sinking current output of the driver, rated for 5A peak source and sink current at VDD = 12V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | SOT-23-5 |
| Category | Motor Driver ICs |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage VDD | VDD | -0.3 | | 22 | V | | 7 |
| OUT voltage DC | | -0.3 | | | V | DC | 7 |
| OUT voltage repetitive pulse | | -2 | | | V | Repetitive pulse less than 200ns | 7 |
| Output continuous current (source/sink) | IOUT_DC | | | 0.4 | A | | 7 |
| Output pulsed current (source/sink) | IOUT_pulsed | | | 5 | A | 0.5us | 7 |
| Input voltage IN+, IN- | | -4 | | 22 | V | | 7 |
| Package thermal impedance | θJA | | | 280 | °C/W | SOT23-5 | 7 |
| Operating virtual junction temperature range | TJ | -40 | | 150 | °C | | 7 |
| Storage temperature range | | -65 | | 150 | °C | | 7 |
| Lead temperature (soldering) | | | | 260 | °C | Soldering, 10s | 7 |
| Supply voltage range | VDD | 4.5 | 12 | 18 | V | | 7 |
| Operating junction temperature range | | -40 | | 140 | °C | | 7 |
| Input voltage IN+, IN- | | 0 | | 18 | V | | 7 |
| Startup current IDD(OFF) | IDD(OFF) | | | 42.5 | μA | VDD=3.4V, IN+=VDD, IN-=GND | 8 |
| Startup current IDD(OFF) | IDD(OFF) | | | 40 | μA | VDD=3.4V, IN+ = IN- = GND | 8 |
| Startup current IDD(OFF) | IDD(OFF) | | | 25 | μA | VDD=3.4V, IN+ = IN- = VDD | 8 |
| Startup current IDD(OFF) | IDD(OFF) | | | 23 | μA | VDD=3.4V, IN+=GND, IN-=VDD | 8 |
| Startup current IDD(OFF) | IDD(OFF) | 215 | 270 | 300 | μA | VDD=12V, IN+=VDD, IN-=GND | 8 |
| Startup current IDD(OFF) | IDD(OFF) | 130 | 180 | 200 | μA | VDD=12V, IN+ = IN- = GND | 8 |
| Startup current IDD(OFF) | IDD(OFF) | 80 | 120 | 130 | μA | VDD=12V, IN+ = IN- = VDD | 8 |
| Startup current IDD(OFF) | IDD(OFF) | 80 | 122.5 | 130 | μA | VDD=12V, IN+=GND, IN-=VDD | 8 |
| Supply start threshold | VON | 3.9 | 4.3 | 4.5 | V | TA = 25°C | 8 |
| Minimum operating voltage after supply start | VOFF | 3.45 | 4 | 4.45 | V | | 8 |
| Input signal high threshold | VIN_H | 2.8 | | | V | Output high for IN+ pin, Output low for IN- pin | 8 |
| Input signal low threshold | VIN_L | | | 1 | V | Output low for IN+ pin, Output high for IN- pin | 8 |
| Input pull-down resistance (IN+) | RINP | 150 | 235 | 250 | kΩ | VDD=12V, VINP=4V | 8 |
| Input pull-down resistance (IN-) | RINN | 150 | 210 | 250 | kΩ | | 8 |
| Source/sink peak current | ISRC/SNK | -5 | | 5 | A | CLOAD=0.22μF, FSW = 1kHz | 8 |
| High output voltage (VOD-VOH) | VOD-VOH | | | 30 | mV | VDD = 12V, IOUT=-10mA | 8 |
| High output voltage (VOD-VOH) | VOD-VOH | | | 35 | mV | VDD = 4.5V, IOUT=-10mA | 8 |
| Low output voltage | VOL | | | 5.05 | mV | VDD = 12V, IOUT=10mA | 8 |
| Low output voltage | VOL | | | 5.15 | mV | VDD = 4.5V, IOUT=10mA | 8 |
| Output pullup resistance | ROH | | 3 | 4 | Ω | VDD = 12V, IOUT=10mA | 8 |
| Output pullup resistance | ROH | | 3.5 | | Ω | VDD = 4.5V, IOUT=10mA | 8 |
| Output pulldown resistance | ROL | | 0.5 | 0.7 | Ω | VDD = 12V, IOUT=10mA | 8 |
| Output pulldown resistance | ROL | | 0.5 | | Ω | VDD = 4.5V, IOUT=10mA | 8 |
| Supply voltage hysteresis | VDD_H | | 0.3 | | V | | 8 |
| Rise time | tR | | 8.5 | | ns | VDD = 12V, CLOAD=1.8nF | 8 |
| Rise time | tR | | 15.5 | | ns | VDD = 4.5V, CLOAD=1.8nF | 8 |
| Fall time | tF | | 7 | | ns | VDD = 12V, CLOAD=1.8nF | 8 |
| Fall time | tF | | 5.5 | | ns | VDD = 4.5V, CLOAD=1.8nF | 8 |
| IN+ to output propagation delay | tD1 | | 11 | | ns | VDD=12V, 5V input pulse CLOAD =1.8nF | 8 |
| IN+ to output propagation delay | tD1 | | 12.5 | | ns | VDD=4.5V, 5V input pulse CLOAD =1.8nF | 8 |
| IN- to output propagation delay | tD2 | | 14 | | ns | VDD=12V, 5V input pulse CLOAD =1.8nF | 8 |
| IN- to output propagation delay | tD2 | | 16 | | ns | VDD=4.5V, 5V input pulse CLOAD =1.8nF | 8 |
## CAD (KiCad official)
- Symbol: `RS8801HXF5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `rs8801hxf5-etched.step` / `rs8801hxf5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rs8801hxf5.step` / `rs8801hxf5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Jiangsu RUNIC Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603346888133795840) (18 pp, sha256 `82da8bdc6f06808f`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/rs8801hxf5-datasheet.pdf)