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RS7N65D

REASUNOS · MOSFETs · TO-252

RS7N65D from REASUNOS, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-to-source voltage is rated at ±30 V maximum and the threshold voltage VGS(TH) is 3 V to 4 V at ID=250 µA.
2 D passive Drain, the middle lead (short stub) and the exposed tab; drain-to-source voltage is rated at 650 V with 7 A continuous drain current at TC=25℃.
3 S passive Source; the body diode carries 7 A continuous source current and 28 A pulsed, with VSD up to 1.4 V at IS=3.5 A.

Key specifications

Parameter Value
Manufacturer REASUNOS
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage VDSS 650 V Tc=25℃ 1
Continuous Drain Current ID 7 A TC=25℃ 1
Pulsed Drain Current IDM 28 A Note*1 1
Power Dissipation PD 110 W Tc=25℃ 1
Gate-to-Source Voltage VGS -30 30 V 1
Single Pulse Avalanche Energy EAS 165 mJ L = 10mH, VDD = 50V, RG = 25 Ω 1
Maximum Soldering Temperature, Leads TL 300 ℃ Leads at 0.063in(1.6mm) from case for 10 seconds 1
Maximum Soldering Temperature, Package Body TPKG 260 ℃ Package body for 10 seconds 1
Operating Junction and Storage Temperature Range TJ, TSTG -55 150 ℃ 1
Junction-to-Case Thermal Resistance RθJC 1.13 ℃/W Drain lead soldered to water cooled heatsink, PD adjusted for a peak junction temperature of +150℃ 2
Junction-to-Ambient Thermal Resistance RθJA 80 ℃/W 1 cubic foot chamber, free air 2
Drain-to-source Breakdown Voltage BVDSS 650 V VGS=0V, ID=250µA 2
Drain-to-Source Leakage Current IDSS 1 µA VDS=650V, VGS=0V 2
Gate-to-Source Forward Leakage IGSS 100 nA VGS=30V, VDS=0V 2
Gate-to-Source Reverse Leakage IGSS -100 nA VGS=-30V, VDS=0V 2
Static Drain-to-Source On-Resistance RDS(on) 1.1 1.35 Ω VGS=10V, ID=3.5A 2
Gate Threshold Voltage VGS(TH) 3 4 V VGS=VDS, ID=250µA 2
Turn-on Delay Time td(ON) 39 nS VDS=325V, ID=7A, RG=25Ω 2
Rise Time trise 23 nS VDS=325V, ID=7A, RG=25Ω 2
Turn-OFF Delay Time td(OFF) 137 nS VDS=325V, ID=7A, RG=25Ω 2
Fall Time tfall 60 nS VDS=325V, ID=7A, RG=25Ω 2
Continuous Source Current IS 7 A Integral pn-diode in MOSFET 3
Maximum Pulsed Current ISM 28 A Integral pn-diode in MOSFET 3
Diode Forward Voltage VSD 1.4 V IS=3.5A, VGS=0V 3
Input Capacitance Ciss 891 pF VGS=0V, VDS=25V, f=1.0MHz 3
Output Capacitance Coss 87 pF VGS=0V, VDS=25V, f=1.0MHz 3
Reverse Transfer Capacitance Crss 10 pF VGS=0V, VDS=25V, f=1.0MHz 3
Total Gate Charge Qg 32 nC VDS=520V, ID=7A, VGS=10V 3
Gate-to-Source Charge Qgs 4.6 nC VDS=520V, ID=7A, VGS=10V 3
Gate-to-Drain (Miller) Charge Qgd 14 nC VDS=520V, ID=7A, VGS=10V 3
Reverse Recovery Time trr 891 nS VGS=0V, IS=7A, di/dt=100A/µs 3
Reverse Recovery Charge Qrr 87 µC VGS=0V, IS=7A, di/dt=100A/µs 3

CAD (KiCad official)

  • Symbol: RS7N65D
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: rs7n65d-etched.step / rs7n65d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rs7n65d.step / rs7n65d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: REASUNOS datasheet (9 pp, sha256 4d019dd721658fae, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF