RS706-2.93YK
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Jiangsu RUNIC Tech RS706 2 93YK Supervisor and Reset ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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markdownRS706-2.93YK
Jiangsu RUNIC Tech · Supervisor and Reset ICs · SOIC-8
RS706-2.93YK from Jiangsu RUNIC Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MR | input | Active-low Manual-Reset input. Triggers a reset pulse when pulled below 0.8 V (VIL at VCC=5 V). Has an internal 20-120 kΩ (52 kΩ typ) pull-up resistor and can be driven by a TTL/CMOS logic line or a pushbutton switch to GND. MR pulse width min 150 ns; MR-to-RESET delay 23 ns typ. |
| 2 | VCC | power_in | Power supply voltage that is monitored. Operating range 1.0 V to 5.5 V; the reset comparator asserts RESET whenever VCC falls below the 2.93 V (2.86-3.00 V) reset threshold. Supply current 20 µA typ, 40 µA max. |
| 3 | GND | power_in | Ground reference for all signals. |
| 4 | PFI | input | Power-Fail Voltage Monitor comparator input. Compared against an internal 1.20 V reference (1.14-1.26 V); when PFI < 1.2 V, PFO is driven low. Input current ±10 nA typ. Tie PFI to GND or VCC if the power-fail comparator is not used. |
| 5 | PFO | output | Active-low Power-Fail comparator output. Goes low and sinks current when PFI < 1.2 V; otherwise stays high. Push-pull output: VOH ≥ 0.7·VCC at 800 µA source, VOL ≤ 0.4 V at 1.2 mA sink. |
| 6 | WDI | input | Watchdog Input. If WDI remains static (high or low) for 1.6 s (typ), the watchdog times out and WDO goes low. Floating WDI or driving it to a high-impedance three-state disables the watchdog. The internal watchdog timer clears whenever RESET is asserted, WDI is three-stated, or WDI sees a rising/falling edge. Min WDI pulse width 16 ns. |
| 7 | RESET | output | Active-low reset output. Pulses low for 160 ms (100-350 ms) when triggered and stays low whenever VCC is below the 2.93 V reset threshold. Remains low for 160 ms after VCC rises above the threshold or after MR goes from low to high. A watchdog timeout will not trigger RESET unless WDO is tied to MR. Push-pull: VOH ≥ 0.7·VCC at 500 µA source, VOL ≤ 0.4 V at 1.2 mA sink. Guaranteed valid down to VCC = 1.0 V. |
| 8 | WDO | output | Active-low Watchdog Output. Pulls low when the internal 1.6 s watchdog timer times out and stays low until the watchdog is cleared. WDO also goes low whenever VCC is below the reset threshold (no minimum pulse width) and returns high with no delay once VCC recovers. Push-pull: VOH ≥ 0.7·VCC at 800 µA source, VOL ≤ 0.4 V at 1.2 mA sink. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | SOIC-8 |
| Category | PMIC |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
RS706-2.93YK
CAD (KiCad official)
- Symbol:
RS706-2.93YK - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
rs706-2-93yk-etched.step/rs706-2-93yk-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs706-2-93yk.step/rs706-2-93yk.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
rs706-2-93yk.step |
122 KB | You want the bare part, or you mark your own boards. |
rs706-2-93yk-etched.step |
2.5 MB | You want the part with RS706-2.93YK already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 596 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu RUNIC Tech datasheet (17 pp, sha256
147553e34d4207a2, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).