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Contents

README

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RS6N50D

REASUNOS · MOSFETs · TO-252

RS6N50D from REASUNOS, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control input with an absolute maximum gate-to-source voltage of ±30 V and a threshold of 3 V to 4 V at ID=250 µA.
2 D passive Drain, also the metal tab, rated for 500 V drain-to-source and 6 A continuous drain current at TC=25 ℃ (24 A pulsed).
3 S passive Source terminal, carrying up to 6 A continuous source current through the integral body diode.

Key specifications

Parameter Value
Manufacturer REASUNOS
Package TO-252
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: RS6N50D
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: rs6n50d-etched.step / rs6n50d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rs6n50d.step / rs6n50d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: REASUNOS datasheet (9 pp, sha256 079fc0c7895044df, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF