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RS540TXTSS20-G

Jiangsu RUNIC Tech · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

RS540TXTSS20-G from Jiangsu RUNIC Tech, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low output enable; pull OE1 high to place all outputs in the 3-state (high-impedance) mode.
2 A0 input Data input for channel 0; recommended input voltage range is 0 V to 5.5 V and the output Y0 is its inverse.
3 A1 input Data input for channel 1; recommended input voltage range is 0 V to 5.5 V and the output Y1 is its inverse.
4 A2 input Data input for channel 2; recommended input voltage range is 0 V to 5.5 V and the output Y2 is its inverse.
5 A3 input Data input for channel 3; recommended input voltage range is 0 V to 5.5 V and the output Y3 is its inverse.
6 A4 input Data input for channel 4; recommended input voltage range is 0 V to 5.5 V and the output Y4 is its inverse.
7 A5 input Data input for channel 5; recommended input voltage range is 0 V to 5.5 V and the output Y5 is its inverse.
8 A6 input Data input for channel 6; recommended input voltage range is 0 V to 5.5 V and the output Y6 is its inverse.
9 A7 input Data input for channel 7; recommended input voltage range is 0 V to 5.5 V and the output Y7 is its inverse.
10 GND power_in Ground reference for the device.
11 Y7 output Inverting data output of channel 7 (complement of A7); goes high-impedance when either output enable is high.
12 Y6 output Inverting data output of channel 6 (complement of A6); goes high-impedance when either output enable is high.
13 Y5 output Inverting data output of channel 5 (complement of A5); goes high-impedance when either output enable is high.
14 Y4 output Inverting data output of channel 4 (complement of A4); goes high-impedance when either output enable is high.
15 Y3 output Inverting data output of channel 3 (complement of A3); goes high-impedance when either output enable is high.
16 Y2 output Inverting data output of channel 2 (complement of A2); goes high-impedance when either output enable is high.
17 Y1 output Inverting data output of channel 1 (complement of A1); goes high-impedance when either output enable is high.
18 Y0 output Inverting data output of channel 0 (complement of A0); goes high-impedance when either output enable is high.
19 OE2 input Active-low output enable; pull OE2 high to place all outputs in the 3-state (high-impedance) mode.
20 VCC power_in Supply voltage, specified from 2.0 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Jiangsu RUNIC Tech
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Supply Voltage Range VCC -0.5 6.5 V 7
Input Voltage Range, A port VI -0.5 6.5 V A port 7
Input Voltage Range, control inputs VI -0.5 6.5 V Control inputs 7
Voltage applied to any output in high-impedance or power-off state, Y port VO -0.5 6.5 V Y port; high-impedance or power-off state 7
Voltage applied to any output in high or low state, Y port VO -0.5 V Y port; high or low state 7
Input clamp current IIK -50 mA VI<0 7
Output clamp current IOK -50 mA VO<0 7
Continuous output current IO -50 50 mA 7
Continuous current through VCC or GND -100 100 mA 7
Package thermal impedance, TSSOP-20 θJA 40 °C/W JESD-51; packages soldered directly onto PCB 7
Junction Temperature TJ -40 150 °C 7
Storage temperature Tstg -65 150 °C 7
Supply Voltage VCC 2 5.5 V 8
High-Level Input Voltage VIH 1 V VCC=2.0V 8
High-Level Input Voltage VIH 1.5 V VCC=3.0V 8
High-Level Input Voltage VIH 2 V VCC=4.5V to 5.5V 8
Low-Level Input Voltage VIL 0.3 V VCC=2.0V 8
Low-Level Input Voltage VIL 0.55 V VCC=3.0V 8
Low-Level Input Voltage VIL 0.8 V VCC=4.5V to 5.5V 8
Input Voltage VI 0 5.5 V 8
Output Voltage VO 0 V 8
High-Level Output Current IOH -8 mA VCC=3.0V to 3.6V 8
High-Level Output Current IOH -16 mA VCC=4.5V to 5.5V 8
Low-Level Output Current IOL 8 mA VCC=3.0V to 3.6V 8
Low-Level Output Current IOL 16 mA VCC=4.5V to 5.5V 8
Input transition rise or fall rate Δt/Δv 50 ns/V VCC=3.0V to 3.6V 8
Input transition rise or fall rate Δt/Δv 10 ns/V VCC=4.5V to 5.5V 8
Operating free-air temperature TA -40 125 °C 8
High-Level Output Voltage VOH 2.8 V IOH = -8mA, VI = VIH; VCC 3.3V; Full temperature range 9
High-Level Output Voltage VOH 4.5 V IOH = -16mA, VI = VIH; VCC 5V; Full temperature range 9
Low-Level Output Voltage VOL 0.1 V IOL = 100µA, VI = VIL; VCC 2.0V to 5.5V; Full temperature range 9
Low-Level Output Voltage VOL 0.55 V IOL = 8mA, VI = VIL; VCC 3.3V; Full temperature range 9
Input leakage current II -1 1 µA VI = 5.5V or GND; VCC 5.5V; +25°C 9
Input leakage current II -2 2 µA VI = 5.5V or GND; VCC 5.5V; Full temperature range 9
Power-off leakage current Ioff -1 1 µA VI or VO = 0 to 5.5V; VCC 0V; +25°C 9
Power-off leakage current Ioff -2 2 µA VI or VO = 0 to 5.5V; VCC 0V; Full temperature range 9
Off-state (high-impedance) output current IOZ -1 1 µA VO = VCC or GND, VI = VIH or VIL; VCC 2.0V to 5.5V; +25°C 9
Off-state (high-impedance) output current IOZ -2 2 µA VO = VCC or GND, VI = VIH or VIL; VCC 2.0V to 5.5V; Full temperature range 9
Quiescent supply current ICC 1 µA VI = VCC or GND, IO = 0; VCC 2.0V to 5.5V; +25°C 9
Quiescent supply current ICC 5 µA VI = VCC or GND, IO = 0; VCC 2.0V to 5.5V; Full temperature range 9
Additional quiescent supply current per input ICCT 100 µA One input at 3.4 V, other inputs at GND or VCC; VCC 5.5V; Full temperature range 9
Propagation delay, An to Yn tPLH/tPHL 4.8 19.5 ns VCC = 2.0V 9
Propagation delay, An to Yn tPLH/tPHL 1.8 7.8 ns VCC = 3.3V 9
Propagation delay, An to Yn tPLH/tPHL 1.5 6.3 ns VCC = 5V 9
Output disable time, OE to Yn tPHZ/tPLZ 4.8 22.2 ns VCC = 2.0V 9
Output disable time, OE to Yn tPHZ/tPLZ 2.1 10 ns VCC = 3.3V 9
Output disable time, OE to Yn tPHZ/tPLZ 1.3 7.7 ns VCC = 5V 9
Output enable time, OE to Yn tPZH/tPZL 4.1 26.6 ns VCC = 2.0V 9
Output enable time, OE to Yn tPZH/tPZL 1.7 11.6 ns VCC = 3.3V 9
Output enable time, OE to Yn tPZH/tPZL 1.6 9.2 ns VCC = 5V 9

CAD (KiCad official)

  • Symbol: RS540TXTSS20-G
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: rs540txtss20-g-etched.step / rs540txtss20-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rs540txtss20-g.step / rs540txtss20-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Jiangsu RUNIC Tech datasheet (16 pp, sha256 63fa0e32435d6e88, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF