component
RS5030XK
Public Made by Adomby adom
Jiangsu RUNIC Tech Voltage Reference, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRS5030XK
Jiangsu RUNIC Tech · Voltage Reference · SOIC-8
RS5030XK from Jiangsu RUNIC Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DNC | unconnected | Do not connect; this pin must be left unconnected. |
| 2 | VIN | power_in | Input supply voltage; the datasheet recommends VIN from VOUT+0.5 V to 16 V, with an absolute maximum of 18 V. |
| 3 | NC | unconnected | No internal connection. |
| 4 | GND | power_in | Ground; all voltages are specified with respect to this pin. |
| 5 | NC | unconnected | No internal connection. |
| 6 | VOUT | power_out | Reference voltage output, which can source and sink up to ±10 mA load current and requires a minimum 1 µF capacitor from VOUT to GND. |
| 7 | NC | unconnected | No internal connection. |
| 8 | DNC | unconnected | Do not connect; this pin must be left unconnected. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Initial Accuracy | -0.1 | 0.1 | % | All voltage options | 7 | ||
| Output Voltage Temperature Drift | dVOUT/dT | 3 | 10 | ppm/°C | TA = -40°C to +125°C | 7 | |
| Line Regulation | 2 | 4 | ppm/V | VIN = (VOUT + 0.5) to 16 V | 7 | ||
| Line Regulation over temperature | 6 | ppm/V | VIN = (VOUT + 0.5) to 16 V, TA = -40°C to +125°C | 7 | |||
| Load Regulation | dVOUT/dILOAD | 2 | 4 | ppm/mA | -10 mA < ILOAD < 10 mA, VIN = VOUT + 0.5 V | 7 | |
| Load Regulation over temperature | dVOUT/dILOAD | 6 | ppm/mA | -10 mA < ILOAD < 10 mA, VIN = VOUT + 0.5V, TA = -40°C to 125°C | 7 | ||
| Short-Circuit Current, sourcing | ISC | 17 | 26 | mA | Sourcing | 7 | |
| Short-Circuit Current, sinking | ISC | 15 | 23 | mA | Sinking | 7 | |
| Capacitive Load | 1 | 50 | μF | 7 | |||
| Voltage VIN (operating) | VIN | 16 | V | ILOAD = 0, TA = -40°C to +125°C | 7 | ||
| Quiescent Current | IQ | 2 | 3 | mA | ILOAD = 0, TA = 25°C | 7 | |
| Quiescent Current over temperature | IQ | 4 | mA | ILOAD = 0, TA = -40°C to +125°C | 7 | ||
| Input voltage | VIN | 16 | V | 6 | |||
| Load current | ILoad | -10 | 10 | mA | 6 | ||
| Supply voltage, V+ to V- | VIN | -0.2 | 18 | V | 6 | ||
| Output short circuit | -30 | 30 | mA | 6 | |||
| Operating temperature | TA | -40 | 125 | °C | 6 | ||
| Junction temperature | TJ | -40 | 150 | °C | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Package thermal impedance | θJA | 110 | °C/W | SOIC-8(SOP8), calculated per JESD-51 | 6 |
CAD (KiCad official)
- Symbol:
RS5030XK - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
rs5030xk-etched.step/rs5030xk-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs5030xk.step/rs5030xk.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu RUNIC Tech datasheet (17 pp, sha256
3dc7f62e26d9c72a, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).