component
RS3112-2.048XK
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Jiangsu RUNIC Tech Voltage Reference, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownRS3112-2.048XK
Jiangsu RUNIC Tech · Voltage Reference · SOP-8
RS3112-2.048XK from Jiangsu RUNIC Tech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection; the datasheet recommends connecting GND to a heat spreading plane. |
| 2 | VIN | power_in | Input supply voltage; for the RS3112-2.048 the minimum is 2.45 V, the recommended maximum is 5 V, and the absolute maximum is 5.5 V. |
| 3 | NC | unconnected | No internal connection; the datasheet recommends connecting GND to a heat spreading plane. |
| 4 | GND | power_in | Ground reference; all voltages are specified with respect to the GND pin. |
| 5 | NC | unconnected | No internal connection; the datasheet recommends connecting GND to a heat spreading plane. |
| 6 | OUT | output | Reference output voltage, rated for a load current of -10 mA to 10 mA with output short-circuit limits of -30 mA to 30 mA, and requires a minimum 1 µF capacitor from VOUT to GND. |
| 7 | NC | unconnected | No internal connection; the datasheet recommends connecting GND to a heat spreading plane. |
| 8 | NC | unconnected | No internal connection; the datasheet recommends connecting GND to a heat spreading plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VOUT | 2.048 | V | RS3112-2.048V | 7 | ||
| Initial Accuracy | -0.1 | 0.1 | % | All voltage options | 7 | ||
| Output Voltage Noise | 35 | μVPP/V | f = 0.1Hz to 10Hz | 7 | |||
| Output Voltage Temperature Drift | dVOUT/dT | 4 | 20 | ppm/°C | TA = -40°C to +125°C | 7 | |
| Long-Term Stability | 100 | ppm | 0 to 1000 hours | 7 | |||
| Line Regulation | 40 | 65 | ppm/V | VIN = (VOUT + 0.3) to 5.5 V | 7 | ||
| Line Regulation over temperature | 150 | ppm/V | VIN = (VOUT + 0.3) to 5.5 V, TA = -40°C to +125°C | 7 | |||
| Load Regulation | dVOUT/dILOAD | 3 | 10 | ppm/mA | -10 mA < ILOAD < 10 mA, VIN = VOUT + 0.3 V | 7 | |
| Load Regulation over temperature | dVOUT/dILOAD | 30 | ppm/mA | -10 mA < ILOAD < 10 mA, VIN = VOUT + 0.3 V, TA = -40°C to 125°C | 7 | ||
| Thermal Hysteresis | dT | 100 | ppm | First Cycle | 7 | ||
| Short-Circuit Current Sourcing | ISC | 30 | mA | Sourcing | 7 | ||
| Short-Circuit Current Sinking | ISC | 25 | mA | Sinking | 7 | ||
| Turn on Settling Time | 200 | μs | To 0.1% with CL = 1μF | 7 | |||
| Capacitive Load | CL | 1 | 50 | μF | 7 | ||
| Supply Voltage | VIN | 5.5 | V | ILOAD = 0, TA = -40°C to +125°C; minimum is VOUT+0.3 | 7 | ||
| Quiescent Current | IQ | 150 | 180 | μA | ILOAD = 0, TA = 25°C | 7 | |
| Quiescent Current over temperature | IQ | 220 | μA | ILOAD = 0, TA = -40°C to +125°C | 7 | ||
| Input Voltage | VIN | 5 | V | Except RS3112-1.25/1.8/2.048 where VIN(min) = 2.45 V | 6 | ||
| Load Current | ILoad | -10 | 10 | mA | 6 | ||
| Supply voltage absolute maximum | VIN | -0.2 | 5.5 | V | V+ to V- | 6 | |
| Output short circuit current | -30 | 30 | mA | 6 | |||
| Operating temperature | TA | -40 | 125 | °C | Operating free-air temperature range | 6 | |
| Junction temperature | TJ | -40 | 150 | °C | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Package thermal impedance SOIC-8(SOP8) | θJA | 110.88 | °C/W | SOIC-8(SOP8), JESD-51 | 6 |
CAD (KiCad official)
- Symbol:
RS3112-2.048XK - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
rs3112-2-048xk-etched.step/rs3112-2-048xk-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs3112-2-048xk.step/rs3112-2-048xk.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu RUNIC Tech datasheet (18 pp, sha256
fac1883cc990e756, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).