component
RS240TXS20
Public Made by Adomby adom
Jiangsu RUNIC Tech Buffers, Drivers, Receivers, Transceivers, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "rs240txs20",
"version": "0.1.0",
"type": "component",
"description": "Jiangsu RUNIC Tech Buffers, Drivers, Receivers, Transceivers, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"logic",
"rs240txs20",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"rs240txs20.kicad_sym",
"rs240txs20.kicad_mod",
"rs240txs20.glb",
"rs240txs20.step",
"rs240txs20.lbr",
"docs/hero.png",
"docs/rs240txs20-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"rs240txs20-hero.glb",
"rs240txs20-hero.overlay.json",
"rs240txs20-etched.glb"
],
"component": {
"mpn": "RS240TXS20",
"manufacturer": "Jiangsu RUNIC Tech",
"package": "SOP-20",
"pin_count": 20,
"category": "Logic",
"subcategory": "Buffers, Drivers, Receivers, Transceivers",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603367082348060672",
"parts": {
"symbol": "rs240txs20.kicad_sym",
"footprint": "rs240txs20.kicad_mod",
"model_3d": "rs240txs20-hero.glb",
"model_3d_plain": "rs240txs20-etched.glb",
"model_3d_step": "rs240txs20-etched.step",
"model_3d_step_plain": "rs240txs20.step",
"lbr": "rs240txs20.lbr"
},
"distributor_links": {
"lcsc": "C22390268"
},
"distributor_check": {
"checked_at": "2026-10-19T01:49:02Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "1OE",
"type": "input",
"description": "Active-low output enable for the first 4-bit buffer; pulling 1OE high places all first-buffer outputs (1Y0-1Y3) in the 3-state mode."
},
{
"number": "2",
"name": "1A0",
"type": "input",
"description": "Data input of the first buffer; when 1OE is low the inverted value of 1A0 appears on 1Y0, and it is TTL-compatible (VIH min 2 V, VIL max 0.8 V at VCC 4.5-5.5 V)."
},
{
"number": "3",
"name": "2Y0",
"type": "output",
"description": "Output of the second buffer; it presents the inverted 2A0 data when 2OE is low and goes high-impedance when 2OE is high, with ±24 mA drive at 5 V."
},
{
"number": "4",
"name": "1A1",
"type": "input",
"description": "Data input of the first buffer; when 1OE is low the inverted value of 1A1 appears on 1Y1, and it is TTL-compatible (VIH min 2 V, VIL max 0.8 V at VCC 4.5-5.5 V)."
},
{
"number": "5",
"name": "2Y1",
"type": "output",
"description": "Output of the second buffer; it presents the inverted 2A1 data when 2OE is low and goes high-impedance when 2OE is high, with ±24 mA drive at 5 V."
},
{
"number": "6",
"name": "1A2",
"type": "input",
"description": "Data input of the first buffer; when 1OE is low the inverted value of 1A2 appears on 1Y2, and it is TTL-compatible (VIH min 2 V, VIL max 0.8 V at VCC 4.5-5.5 V)."
},
{
"number": "7",
"name": "2Y2",
"type": "output",
"description": "Output of the second buffer; it presents the inverted 2A2 data when 2OE is low and goes high-impedance when 2OE is high, with ±24 mA drive at 5 V."
},
{
"number": "8",
"name": "1A3",
"type": "input",
"description": "Data input of the first buffer; when 1OE is low the inverted value of 1A3 appears on 1Y3, and it is TTL-compatible (VIH min 2 V, VIL max 0.8 V at VCC 4.5-5.5 V)."
},
{
"number": "9",
"name": "2Y3",
"type": "output",
"description": "Output of the second buffer; it presents the inverted 2A3 data when 2OE is low and goes high-impedance when 2OE is high, with ±24 mA drive at 5 V."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "11",
"name": "2A3",
"type": "input",
"description": "Data input of the second buffer; when 2OE is low the inverted value of 2A3 appears on 2Y3, and it is TTL-compatible (VIH min 2 V, VIL max 0.8 V at VCC 4.5-5.5 V)."
},
{
"number": "12",
"name": "1Y3",
"type": "output",
"description": "Output of the first buffer; it presents the inverted 1A3 data when 1OE is low and goes high-impedance when 1OE is high, with ±24 mA drive at 5 V."
},
{
"number": "13",
"name": "2A2",
"type": "input",
"description": "Data input of the second buffer; when 2OE is low the inverted value of 2A2 appears on 2Y2, and it is TTL-compatible (VIH min 2 V, VIL max 0.8 V at VCC 4.5-5.5 V)."
},
{
"number": "14",
"name": "1Y2",
"type": "output",
"description": "Output of the first buffer; it presents the inverted 1A2 data when 1OE is low and goes high-impedance when 1OE is high, with ±24 mA drive at 5 V."
},
{
"number": "15",
"name": "2A1",
"type": "input",
"description": "Data input of the second buffer; when 2OE is low the inverted value of 2A1 appears on 2Y1, and it is TTL-compatible (VIH min 2 V, VIL max 0.8 V at VCC 4.5-5.5 V)."
},
{
"number": "16",
"name": "1Y1",
"type": "output",
"description": "Output of the first buffer; it presents the inverted 1A1 data when 1OE is low and goes high-impedance when 1OE is high, with ±24 mA drive at 5 V."
},
{
"number": "17",
"name": "2A0",
"type": "input",
"description": "Data input of the second buffer; when 2OE is low the inverted value of 2A0 appears on 2Y0, and it is TTL-compatible (VIH min 2 V, VIL max 0.8 V at VCC 4.5-5.5 V)."
},
{
"number": "18",
"name": "1Y0",
"type": "output",
"description": "Output of the first buffer; it presents the inverted 1A0 data when 1OE is low and goes high-impedance when 1OE is high, with ±24 mA drive at 5 V."
},
{
"number": "19",
"name": "2OE",
"type": "input",
"description": "Active-low output enable for the second 4-bit buffer; pulling 2OE high places all second-buffer outputs (2Y0-2Y3) in the 3-state mode."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage, 4.5 V to 5.5 V (4.5 V ≤ VCC ≤ 5.5 V)."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The datasheet pin table covers TSSOP20 and SOP20 with one shared pinout, and the ordering table list; Input pin descriptions combine the per-pin function from the pin table with the TTL input levels fro"
],
"pages_sent": 15,
"cost_usd": 0.0669,
"at": "2026-10-19T01:44:46"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603367082348060672",
"pages": 15,
"sha256": "7ca59235985e3ec5",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "rs240txs20.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.26,
12.8,
2.65
],
"zmin_mm": 0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "6c5b6ea19508d63ca7f6be48434227c9508cd3897526f3a9bbe0322cd5d794fe",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "rs240txs20-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.26,
12.8,
2.65
],
"zmin_mm": 0.0,
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"footprint_binding": "identity",
"sha256": "f170167559fc6c0aca572797157b249ec8cad4ce70091a221175dc8be296055b",
"checked": "2026-10-19",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
}
}