component
RS1G373XC6
Public Made by Adomby adom
Jiangsu RUNIC Tech Latches, SC-70-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
RS1G373XC6
Jiangsu RUNIC Tech · Latches · SC-70-6
RS1G373XC6 from Jiangsu RUNIC Tech, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LE | input | Latch enable input: the Q output follows the D input while LE is high and latches the level present at D when LE is taken low. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | D | input | D latch data input, which is passed to Q while LE is high and accepts voltages up to 5.5 V. |
| 4 | Q | output | Latch output that is placed in the high-impedance state when OE is high, and is rated for ±24 mA at VCC = 3.0 V. |
| 5 | VCC | power_in | Supply voltage, operating from 1.65 V to 5.5 V, which should be bypassed close to the pin with a capacitor. |
| 6 | OE | input | Active-low output enable: a high level places Q in the high-impedance state and does not affect the internal latch operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | SC-70-6 |
| Category | Logic ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 6.5 | V | 6 | ||
| Input voltage range | VI | -0.5 | 6.5 | V | 6 | ||
| Voltage applied to any output in high-impedance or power-off state | Vo | -0.5 | 6.5 | V | 6 | ||
| Voltage applied to any output in high or low state (max printed as VCC+0.5) | Vo | -0.5 | V | 6 | |||
| Input clamp current | IIK | -50 | mA | VI<0 | 6 | ||
| Output clamp current | IOK | -50 | mA | VO<0 | 6 | ||
| Continuous output current | IO | -50 | 50 | mA | 6 | ||
| Continuous current through VCC or GND | -100 | 100 | mA | 6 | |||
| Junction temperature | TJ | -65 | 150 | °C | 6 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 6 | ||
| Package thermal impedance, SOT363/(SC70-6) | θJA | 265 | °C/W | JESD-51; package soldered directly onto PCB | 6 | ||
| Supply voltage (operating) | VCC | 1.65 | 5.5 | V | Operating | 7 | |
| High-level input voltage | VIH | 1.7 | V | VCC=2.3V to 2.7V | 7 | ||
| High-level input voltage | VIH | 2 | V | VCC=3V to 3.6V | 7 | ||
| Low-level input voltage | VIL | 0.7 | V | VCC=2.3V to 2.7V | 7 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC=3V to 3.6V | 7 | ||
| Input voltage | VI | 0 | 5.5 | V | 7 | ||
| Output voltage (max printed as VCC) | VO | 0 | V | 7 | |||
| High-level output current | IOH | -4 | mA | VCC=1.65V | 7 | ||
| High-level output current | IOH | -8 | mA | VCC=2.3V | 7 | ||
| High-level output current | IOH | -16 | mA | VCC=3V | 7 | ||
| High-level output current | IOH | -24 | mA | VCC=3V | 7 | ||
| High-level output current | IOH | -32 | mA | VCC=4.5V | 7 | ||
| Low-level output current | IOL | 4 | mA | VCC=1.65V | 7 | ||
| Low-level output current | IOL | 8 | mA | VCC=2.3V | 7 | ||
| Low-level output current | IOL | 16 | mA | VCC=3V | 7 | ||
| Low-level output current | IOL | 24 | mA | VCC=3V | 7 | ||
| Low-level output current | IOL | 32 | mA | VCC=4.5V | 7 | ||
| Input transition rise or fall rate | Δt/Δv | 20 | ns/V | VCC=1.8V±0.15V, 2.5V±0.2V | 7 | ||
| Input transition rise or fall rate | Δt/Δv | 10 | ns/V | VCC=3.3V±0.3V | 7 | ||
| Input transition rise or fall rate | Δt/Δv | 5 | ns/V | VCC=5V±0.5V | 7 | ||
| High-level output voltage | VOH | 1.2 | V | IOH = -4mA; VCC=1.65V | 8 | ||
| High-level output voltage | VOH | 1.9 | V | IOH = -8mA; VCC=2.3V | 8 | ||
| High-level output voltage | VOH | 2.4 | V | IOH = -16mA; VCC=3V | 8 | ||
| High-level output voltage | VOH | 2.3 | V | IOH = -24mA; VCC=3V | 8 | ||
| High-level output voltage | VOH | 3.8 | V | IOH = -32mA; VCC=4.5V | 8 | ||
| Low-level output voltage | VOL | 0.1 | V | IOL = 100μA; VCC 1.65V to 5.5V; Full | 8 | ||
| Low-level output voltage | VOL | 0.45 | V | IOL = 4mA; VCC=1.65V | 8 | ||
| Low-level output voltage | VOL | 0.3 | V | IOL = 8mA; VCC=2.3V | 8 | ||
| Low-level output voltage | VOL | 0.4 | V | IOL = 16mA; VCC=3V | 8 | ||
| Low-level output voltage | VOL | 0.55 | V | IOL = 24mA; VCC=3V | 8 | ||
| Quiescent supply current | ICC | 0.1 | 1 | µA | VI=5.5V or GND, IO=0; VCC 1.65V to 5.5V; +25°C | 8 | |
| Quiescent supply current | ICC | 10 | µA | VI=5.5V or GND, IO=0; VCC 1.65V to 5.5V; Full | 8 | ||
| Additional quiescent supply current per input | ΔICC | 500 | µA | One input at VCC-0.6V, others at VCC or GND; VCC 3V to 5.5V; Full | 8 | ||
| Input leakage current | II | -1 | 1 | µA | VI=5.5V or GND; VCC 0V to 5.5V; +25°C | 8 | |
| Input leakage current | II | -5 | 5 | µA | VI=5.5V or GND; VCC 0V to 5.5V; Full | 8 | |
| Off-state output current | IOZ | -1 | 1 | µA | VO=0V to 5.5V; VCC 3.6V; +25°C | 8 | |
| Off-state output current | IOZ | -5 | 5 | µA | VO=0V to 5.5V; VCC 3.6V; Full | 8 | |
| Propagation delay, D to Q | tpd | 7 | 21 | 34 | ns | VCC=1.8V±0.15V, CL=30pF, RL=1kΩ; FULL | 9 |
| Propagation delay, D to Q | tpd | 5.2 | 15 | 25 | ns | VCC=2V±0.15V, CL=30pF, RL=1kΩ; FULL | 9 |
| Propagation delay, D to Q | tpd | 3.5 | 10 | 16.5 | ns | VCC=2.5V±0.2V, CL=30pF, RL=500Ω; FULL | 9 |
| Propagation delay, D to Q | tpd | 2.6 | 8 | 13 | ns | VCC=3.3V±0.3V, CL=50pF, RL=500Ω; FULL | 9 |
| Propagation delay, D to Q | tpd | 1.7 | 7 | 11.5 | ns | VCC=5V±0.5V, CL=50pF, RL=500Ω; FULL | 9 |
| Propagation delay, LE to Q | tpd | 7.5 | 23 | 37 | ns | VCC=1.8V±0.15V, CL=30pF, RL=1kΩ; FULL | 9 |
| Propagation delay, LE to Q | tpd | 6 | 16 | 26.5 | ns | VCC=2V±0.15V, CL=30pF, RL=1kΩ; FULL | 9 |
| Propagation delay, LE to Q | tpd | 3.2 | 10 | 16.5 | ns | VCC=2.5V±0.2V, CL=30pF, RL=500Ω; FULL | 9 |
| Propagation delay, LE to Q | tpd | 2.6 | 8 | 13 | ns | VCC=3.3V±0.3V, CL=50pF, RL=500Ω; FULL | 9 |
| Propagation delay, LE to Q | tpd | 1.6 | 7 | 11.5 | ns | VCC=5V±0.5V, CL=50pF, RL=500Ω; FULL | 9 |
CAD (KiCad official)
- Symbol:
RS1G373XC6 - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files:
rs1g373xc6-etched.step/rs1g373xc6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rs1g373xc6.step/rs1g373xc6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Jiangsu RUNIC Tech datasheet (17 pp, sha256
2b54af922d48901e, retrieved 2026-10-29, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# RS1G373XC6
**Jiangsu RUNIC Tech** · Latches · SC-70-6
RS1G373XC6 from Jiangsu RUNIC Tech, in a SC-70-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LE | input | Latch enable input: the Q output follows the D input while LE is high and latches the level present at D when LE is taken low. |
| 2 | GND | power_in | Ground reference for the device. |
| 3 | D | input | D latch data input, which is passed to Q while LE is high and accepts voltages up to 5.5 V. |
| 4 | Q | output | Latch output that is placed in the high-impedance state when OE is high, and is rated for ±24 mA at VCC = 3.0 V. |
| 5 | VCC | power_in | Supply voltage, operating from 1.65 V to 5.5 V, which should be bypassed close to the pin with a capacitor. |
| 6 | OE | input | Active-low output enable: a high level places Q in the high-impedance state and does not affect the internal latch operation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Jiangsu RUNIC Tech |
| Package | SC-70-6 |
| Category | Logic ICs |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | | 6.5 | V | | 6 |
| Input voltage range | VI | -0.5 | | 6.5 | V | | 6 |
| Voltage applied to any output in high-impedance or power-off state | Vo | -0.5 | | 6.5 | V | | 6 |
| Voltage applied to any output in high or low state (max printed as VCC+0.5) | Vo | -0.5 | | | V | | 6 |
| Input clamp current | IIK | -50 | | | mA | VI<0 | 6 |
| Output clamp current | IOK | -50 | | | mA | VO<0 | 6 |
| Continuous output current | IO | -50 | | 50 | mA | | 6 |
| Continuous current through VCC or GND | | -100 | | 100 | mA | | 6 |
| Junction temperature | TJ | -65 | | 150 | °C | | 6 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 6 |
| Package thermal impedance, SOT363/(SC70-6) | θJA | | 265 | | °C/W | JESD-51; package soldered directly onto PCB | 6 |
| Supply voltage (operating) | VCC | 1.65 | | 5.5 | V | Operating | 7 |
| High-level input voltage | VIH | 1.7 | | | V | VCC=2.3V to 2.7V | 7 |
| High-level input voltage | VIH | 2 | | | V | VCC=3V to 3.6V | 7 |
| Low-level input voltage | VIL | | | 0.7 | V | VCC=2.3V to 2.7V | 7 |
| Low-level input voltage | VIL | | | 0.8 | V | VCC=3V to 3.6V | 7 |
| Input voltage | VI | 0 | | 5.5 | V | | 7 |
| Output voltage (max printed as VCC) | VO | 0 | | | V | | 7 |
| High-level output current | IOH | -4 | | | mA | VCC=1.65V | 7 |
| High-level output current | IOH | -8 | | | mA | VCC=2.3V | 7 |
| High-level output current | IOH | -16 | | | mA | VCC=3V | 7 |
| High-level output current | IOH | -24 | | | mA | VCC=3V | 7 |
| High-level output current | IOH | -32 | | | mA | VCC=4.5V | 7 |
| Low-level output current | IOL | | | 4 | mA | VCC=1.65V | 7 |
| Low-level output current | IOL | | | 8 | mA | VCC=2.3V | 7 |
| Low-level output current | IOL | | | 16 | mA | VCC=3V | 7 |
| Low-level output current | IOL | | | 24 | mA | VCC=3V | 7 |
| Low-level output current | IOL | | | 32 | mA | VCC=4.5V | 7 |
| Input transition rise or fall rate | Δt/Δv | | | 20 | ns/V | VCC=1.8V±0.15V, 2.5V±0.2V | 7 |
| Input transition rise or fall rate | Δt/Δv | | | 10 | ns/V | VCC=3.3V±0.3V | 7 |
| Input transition rise or fall rate | Δt/Δv | | | 5 | ns/V | VCC=5V±0.5V | 7 |
| High-level output voltage | VOH | 1.2 | | | V | IOH = -4mA; VCC=1.65V | 8 |
| High-level output voltage | VOH | 1.9 | | | V | IOH = -8mA; VCC=2.3V | 8 |
| High-level output voltage | VOH | 2.4 | | | V | IOH = -16mA; VCC=3V | 8 |
| High-level output voltage | VOH | 2.3 | | | V | IOH = -24mA; VCC=3V | 8 |
| High-level output voltage | VOH | 3.8 | | | V | IOH = -32mA; VCC=4.5V | 8 |
| Low-level output voltage | VOL | | | 0.1 | V | IOL = 100μA; VCC 1.65V to 5.5V; Full | 8 |
| Low-level output voltage | VOL | | | 0.45 | V | IOL = 4mA; VCC=1.65V | 8 |
| Low-level output voltage | VOL | | | 0.3 | V | IOL = 8mA; VCC=2.3V | 8 |
| Low-level output voltage | VOL | | | 0.4 | V | IOL = 16mA; VCC=3V | 8 |
| Low-level output voltage | VOL | | | 0.55 | V | IOL = 24mA; VCC=3V | 8 |
| Quiescent supply current | ICC | | 0.1 | 1 | µA | VI=5.5V or GND, IO=0; VCC 1.65V to 5.5V; +25°C | 8 |
| Quiescent supply current | ICC | | | 10 | µA | VI=5.5V or GND, IO=0; VCC 1.65V to 5.5V; Full | 8 |
| Additional quiescent supply current per input | ΔICC | | | 500 | µA | One input at VCC-0.6V, others at VCC or GND; VCC 3V to 5.5V; Full | 8 |
| Input leakage current | II | -1 | | 1 | µA | VI=5.5V or GND; VCC 0V to 5.5V; +25°C | 8 |
| Input leakage current | II | -5 | | 5 | µA | VI=5.5V or GND; VCC 0V to 5.5V; Full | 8 |
| Off-state output current | IOZ | -1 | | 1 | µA | VO=0V to 5.5V; VCC 3.6V; +25°C | 8 |
| Off-state output current | IOZ | -5 | | 5 | µA | VO=0V to 5.5V; VCC 3.6V; Full | 8 |
| Propagation delay, D to Q | tpd | 7 | 21 | 34 | ns | VCC=1.8V±0.15V, CL=30pF, RL=1kΩ; FULL | 9 |
| Propagation delay, D to Q | tpd | 5.2 | 15 | 25 | ns | VCC=2V±0.15V, CL=30pF, RL=1kΩ; FULL | 9 |
| Propagation delay, D to Q | tpd | 3.5 | 10 | 16.5 | ns | VCC=2.5V±0.2V, CL=30pF, RL=500Ω; FULL | 9 |
| Propagation delay, D to Q | tpd | 2.6 | 8 | 13 | ns | VCC=3.3V±0.3V, CL=50pF, RL=500Ω; FULL | 9 |
| Propagation delay, D to Q | tpd | 1.7 | 7 | 11.5 | ns | VCC=5V±0.5V, CL=50pF, RL=500Ω; FULL | 9 |
| Propagation delay, LE to Q | tpd | 7.5 | 23 | 37 | ns | VCC=1.8V±0.15V, CL=30pF, RL=1kΩ; FULL | 9 |
| Propagation delay, LE to Q | tpd | 6 | 16 | 26.5 | ns | VCC=2V±0.15V, CL=30pF, RL=1kΩ; FULL | 9 |
| Propagation delay, LE to Q | tpd | 3.2 | 10 | 16.5 | ns | VCC=2.5V±0.2V, CL=30pF, RL=500Ω; FULL | 9 |
| Propagation delay, LE to Q | tpd | 2.6 | 8 | 13 | ns | VCC=3.3V±0.3V, CL=50pF, RL=500Ω; FULL | 9 |
| Propagation delay, LE to Q | tpd | 1.6 | 7 | 11.5 | ns | VCC=5V±0.5V, CL=50pF, RL=500Ω; FULL | 9 |
## CAD (KiCad official)
- Symbol: `RS1G373XC6`
- Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`
- 3D model: SC-70-6 (KiCad packages3D, STEP)
- 3D model files: `rs1g373xc6-etched.step` / `rs1g373xc6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rs1g373xc6.step` / `rs1g373xc6.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Jiangsu RUNIC Tech datasheet](docs/rs1g373xc6-datasheet.pdf) (17 pp, sha256 `2b54af922d48901e`, retrieved 2026-10-29, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/rs1g373xc6-datasheet.pdf)