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RS100N78T

REASUNOS · MOSFETs · TO-220

RS100N78T from REASUNOS, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-to-source voltage limited to ±20 V with a threshold of 1.2 V min to 2.6 V max at 250 µA.
2 D passive Drain (also connected to the mounting tab); drain-to-source voltage 100 V, continuous current 78 A at TC=25℃.
3 S passive Source; connects to the body diode anode, with continuous source current of 78 A.

Key specifications

Parameter Value
Manufacturer REASUNOS
Package TO-220
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Breakdown Voltage BVDSS 100 V VGS=0V,ID=250µA 2
Drain-to-Source Leakage Current IDSS 1 µA VDS=80V,VGS=0V 2
Gate-to-Source Forward Leakage IGSS 100 nA VGS=20V,VDS=0V 2
Gate-to-Source Reverse Leakage IGSS -100 nA VGS=-20V,VDS=0V 2
Static Drain-to-Source On-Resistance RDS(on) 8.2 9.5 mΩ VGS=10V,ID=20A 2
Static Drain-to-Source On-Resistance RDS(on) 11.3 13.5 mΩ VGS=4.5V,ID=10A 2
Gate Threshold Voltage VGS(TH) 1.2 1.8 2.6 V VGS=VDS,ID=250µA 2
Continuous Source Current IS 78 A Integral pn-diode in MOSFET 3
Maximum Pulsed Current ISM 312 A Integral pn-diode in MOSFET 3
Diode Forward Voltage VSD 1 V IS=20A,VGS=0V 3
Drain-to-Source Voltage VDSS 100 V Tc=25℃ 1
Continuous Drain Current ID 78 A TC=25℃ 1
Continuous Drain Current ID 45 A TC=100℃ 1
Pulsed Drain Current IDM 312 A 1
Power Dissipation PD 78 W 1
Gate-to-Source Voltage VGS -20 20 V 1
Single Pulse Avalanche Energy EAS 81 mJ L = 0.5mH,VDS = 50V, RG = 25Ω, Tj = 25℃ 1
Maximum Soldering Temperature, Leads TL 300 ℃ Leads at 0.063in(1.6mm) from Case for 10 seconds 1
Maximum Soldering Temperature, Package Body TPKG 260 ℃ Package Body for 10 seconds 1
Operating Junction and Storage Temperature Range TJ, TSTG -55 150 ℃ 1
Thermal Resistance Junction-to-Case RθJC 1.6 ℃/W Drain lead soldered to water cooled heatsink, PD adjusted for a peak junction temperature of +150℃ 2
Thermal Resistance Junction-to-Ambient RθJA 50 ℃/W 1 cubic foot chamber, free air 2
Turn-on Delay Time td(ON) 17 nS VDS=50V, ID=20A, RG=3Ω, VGS=10V 2
Rise Time trise 4 nS VDS=50V, ID=20A, RG=3Ω, VGS=10V 2
Turn-off Delay Time td(OFF) 32 nS VDS=50V, ID=20A, RG=3Ω, VGS=10V 2
Fall Time tfall 8 nS VDS=50V, ID=20A, RG=3Ω, VGS=10V 2
Input Capacitance Ciss 2018 pF VGS=0V, VDS=50V, f=1MHz 3
Output Capacitance Coss 580 pF VGS=0V, VDS=50V, f=1MHz 3
Reverse Transfer Capacitance Crss 28 pF VGS=0V, VDS=50V, f=1MHz 3
Total Gate Charge Qg 38.5 nC VDS=50V, ID=20A, VGS=10V 3
Gate-to-Source Charge Qgs 8 nC VDS=50V, ID=20A, VGS=10V 3
Gate-to-Drain (Miller) Charge Qgd 9 nC VDS=50V, ID=20A, VGS=10V 3
Reverse Recovery Time trr 50.4 nS VGS=0V, IS=20A, di/dt=100A/µs 3
Reverse Recovery Charge Qrr 68 nC VGS=0V, IS=20A, di/dt=100A/µs 3

CAD (KiCad official)

  • Symbol: RS100N78T
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: rs100n78t-etched.step / rs100n78t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rs100n78t.step / rs100n78t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: REASUNOS datasheet (9 pp, sha256 302dea07fe7c1473, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF