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RN8211B

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RENERGY Microcontroller Units (MCUs/MPUs/SOCs), LQFP-64(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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RN8211B

RENERGY · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-64(7x7)

RN8211B from RENERGY, in a LQFP-64(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LDO33 power_out 3.3V metering LDO output powering the metering ADC; external 0.1uF and 1uF capacitors in parallel.
2 P00/AIN0/KEY2/RX2 bidirectional P00 GPIO multiplexed with SAR-ADC input AIN0, KEY2 and UART2 RX.
3 P01/AIN1/KEY3/TX2 bidirectional P01 GPIO multiplexed with SAR-ADC input AIN1, KEY3 and UART2 TX.
4 AIN2/CMP1/P02 bidirectional SAR-ADC input AIN2, comparator 1 input, or P02 GPIO.
5 AIN3/CMP2/P03 bidirectional SAR-ADC input AIN3, low-power comparator 2 input, or P03 GPIO.
6 UP input Positive analog input of the voltage channel; maximum differential input signal is ±1V at 1x gain.
7 UN input Negative analog input of the voltage channel.
8 IBP input Positive analog input of current channel B.
9 IBN input Negative analog input of current channel B.
10 IAP input Positive analog input of current channel A, maximum 16x gain, for manganin shunt sampling.
11 IAN input Negative analog input of current channel A, maximum 16x gain, for manganin shunt sampling.
12 AGND power_in Analog ground.
13 REFV passive Reference input of the metering ADC; external 0.1uF and 1uF capacitors in parallel.
14 VCC power_in 2.8V~5.5V supply input, decoupled with 4.7uF in parallel with 0.1uF.
15 RSTN input Active-low reset input with internal 50K pull-up resistor; low for more than 1ms causes reset.
16 XO passive 32.768kHz passive crystal pin; no external resistor or capacitor needed, isolate with ground trace.
17 XI passive 32.768kHz passive crystal pin; no external resistor or capacitor needed, isolate with ground trace.
18 DGND power_in Digital ground.
19 LDO18 power_out 1.8V LDO output supplying the 1.8V digital domain; external 1uF in parallel with 0.1uF.
20 P93/SEG31 bidirectional LCD segment 31 / P93 GPIO multiplexed pin.
21 DGND power_in Digital ground.
22 P92/SEG30 bidirectional LCD segment 30 / P92 GPIO multiplexed pin.
23 P91/SEG29 bidirectional LCD segment 29 / P91 GPIO multiplexed pin.
24 P90/SEG28 bidirectional LCD segment 28 / P90 GPIO multiplexed pin.
25 P87/SEG27 bidirectional LCD segment 27 / P87 GPIO multiplexed pin.
26 P86/SEG26 bidirectional LCD segment 26 / P86 GPIO multiplexed pin.
27 P85/SEG25 bidirectional LCD segment 25 / P85 GPIO multiplexed pin.
28 P84/SEG24 bidirectional LCD segment 24 / P84 GPIO multiplexed pin.
29 P83/SEG23 bidirectional LCD segment 23 / P83 GPIO multiplexed pin.
30 P82/SEG22 bidirectional LCD segment 22 / P82 GPIO multiplexed pin.
31 P81/SEG21 bidirectional LCD segment 21 / P81 GPIO multiplexed pin.
32 P80/SEG20 bidirectional LCD segment 20 / P80 GPIO multiplexed pin.
33 LCDVP2 passive Analog charge-pump pin; connect 100nF between LCDVP2 and LCDVP1, may float when resistor-divider LCD bias is used.
34 LCDVP1 passive Analog charge-pump pin; connect 100nF between LCDVP2 and LCDVP1, may float when resistor-divider LCD bias is used.
35 LCDVA passive LCD voltage output; requires external 470nF capacitor for both charge-pump and resistor-divider modes.
36 LCDVB passive LCD voltage output; requires external 470nF capacitor for both charge-pump and resistor-divider modes.
37 LCDVC passive LCD voltage output; requires external 470nF capacitor for both charge-pump and resistor-divider modes.
38 LCDVD passive LCD voltage output (5V charge pump or 3.3V resistor divider); requires external 470nF capacitor.
39 P52/SCL/TCIO bidirectional P52 GPIO multiplexed with I2C SCL and timer I/O; selectable pull-up, TTL/CMOS input and open-drain.
40 P53/SDA/TCIO bidirectional P53 GPIO multiplexed with I2C SDA and timer I/O; selectable pull-up, TTL/CMOS input and open-drain.
41 P54/RX5/TCIO bidirectional P54 GPIO multiplexed with UART5 input and timer I/O.
42 P55/TX5/TCIO bidirectional P55 GPIO multiplexed with UART5 output and timer I/O.
43 DGND power_in Digital ground.
44 P20/RX0 bidirectional P20 GPIO multiplexed with UART0 RX; selectable pull-up, TTL/CMOS level and open-drain.
45 P21/TX0 bidirectional P21 GPIO multiplexed with UART0 TX; selectable pull-up, TTL/CMOS level and open-drain.
46 P22/RX1 bidirectional P22 GPIO multiplexed with UART1 RX; selectable pull-up, TTL/CMOS level and open-drain.
47 P23/TX1 bidirectional P23 GPIO multiplexed with UART1 TX; selectable pull-up, TTL/CMOS level and open-drain.
48 P37/INT7/HOSCI bidirectional P3 GPIO / external interrupt 7 / high-frequency crystal pin; crystal needs 10M ohm in series and two 15pF capacitors.
49 P36/INT6/HOSCO bidirectional P3 GPIO / external interrupt 6 / high-frequency crystal pin; crystal needs 10M ohm in series and two 15pF capacitors.
50 SEG3/COM7 output LCD SEG3 and COM7 multiplexed port.
51 SEG2/COM6 output LCD SEG2 and COM6 multiplexed port.
52 SEG1/COM5 output LCD SEG1 and COM5 multiplexed port.
53 SEG0/COM4 output LCD SEG0 and COM4 multiplexed port.
54 COM3 output LCD COM3 port.
55 COM2 output LCD COM2 port.
56 COM1 output LCD COM1 port.
57 COM0 output LCD COM0 port.
58 P10/KEY0/TCIO bidirectional P10 GPIO, KEY0 input and timer I/O; selectable pull-up, TTL/CMOS level and open-drain.
59 P11/KEY1/TCIO bidirectional P11 GPIO, KEY1 input and timer I/O; selectable pull-up, TTL/CMOS level and open-drain.
60 P30/INT0/TCI bidirectional P30 GPIO, external interrupt 0 and timer input; Schmitt input, 6mA drive; low level after reset enters ISP.
61 P32/INT2/RTCOUT/KEY5 bidirectional P32 GPIO, external interrupt 2, RTC pulse output and KEY5 input; Schmitt input, 6mA drive.
62 P50/PF/RTCOUT/SF/QF bidirectional P50 GPIO with active, RTC, apparent or reactive pulse output; Schmitt input, 6mA drive.
63 SWDCLK/P24/RX2 bidirectional SWD clock, UART2 input or P24 GPIO; selectable pull-up, TTL/CMOS level and open-drain.
64 SWDIO/P25/TX2 bidirectional SWD data, UART2 output or P25 GPIO; selectable pull-up, TTL/CMOS level and open-drain.

Key specifications

Parameter Value
Manufacturer RENERGY
Package LQFP-64(7x7)
Category Embedded Processors & Controllers
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Reference voltage output Vref 1.22 1.25 1.29 V VCC=3V5.5V, -40+85℃ 25
Reference temperature coefficient Tc 5 15 ppm/℃ VCC=3V5.5V, -40+85℃ 25
CMP1/CMP2 threshold CMP 1.23 1.28 1.33 V CMP2 output low comparison threshold 25
Switch-to-main-supply threshold 2.6 2.8 3 V VCC above threshold or above VBAT switches to VCC 25
Switch-to-battery threshold 2.5 2.7 2.9 V VCC below threshold and below VBAT switches to VBAT 25
LCD output voltage (charge pump) LCDVD 4.85 5 5.15 V 5V charge pump, full temperature range 25
LCD output voltage (resistor divider) LCDVD 3.135 3.3 3.465 V 3.3V resistor string divider, full temperature range 25
VBAT measurement range VBATD 0 3.6 3.8 V SAR ADC measurement of VBAT 26
Internal high-frequency RC RCH 1.4 1.6 1.8 MHz -40~+85℃ 26
Internal low-frequency RC RCL 20 30 40 KHz -40~+85℃ 26
Main supply voltage VCC 2.8 5.5 V typ 5/3.3; recommended 5V±5% or 3.3V±5% 26
CPU minimum operating voltage Vil 2.25 2.35 2.45 V full temperature range 26
Battery voltage VBAT 2 3.6 5.5 V -40~+85℃ 26
LDO33 output V33 3.2 3.3 3.4 V -40~+85℃ 26
LDO18 output V1P8 1.62 1.8 1.98 V -40~+85℃ 26
Main supply voltage Vvcc -0.3 7 V 26
Battery input voltage Vvbat -0.3 7 V 26
DVDD to DGND -0.3 7 V 26
DVDD to AVDD 0.3 V 26
Operating temperature TA -40 85 ℃ 27
Storage temperature Tstg -65 150 ℃ 27
Lead-free soldering temperature TSDR 260 ℃ 27
Analog input voltage vs AGND VINA -0.3 V upper limit AVDD+0.3 27
Active energy error Err -0.1 0.1 % Room temperature, 5000:1 dynamic range 25
Reactive energy error Err -0.1 0.1 % Room temperature, 5000:1 dynamic range 25
Apparent energy error Err -0.1 0.1 % Room temperature, 5000:1 dynamic range 25
RMS measurement error Err -0.2 0.2 % Room temperature, 1000:1 dynamic range 25
Power measurement error Err -0.1 0.1 % Room temperature, 1000:1 dynamic range 25
HBM ESD ESD 4000 V JEDEC EIA/JESD22-A114, all pins 27
Run mode current, 3.6864M PLL IVCC 3.5 mA VCC=5V, CPU at 3.6864MHz, metering on 26
Sleep current, LOSC SIdd 6 μA 32.768K LOSC mode, VCC=3.6V 26

CAD (KiCad official)

  • Symbol: RN8211B
  • Footprint: Package_QFP:LQFP-64_7x7mm_P0.4mm
  • 3D model: LQFP-64(7x7) (KiCad packages3D, STEP)
  • 3D model files: rn8211b-etched.step / rn8211b-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rn8211b.step / rn8211b.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENERGY datasheet (168 pp, sha256 6e607c512df6bef7, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF