component
RJM8L151SK8Q6R
Public Made by Adomby adom
Runjet(瑞纳捷) Microcontrollers (MCU/MPU/SOC), QFN-32(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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RJM8L151SK8Q6R
Runjet(瑞纳捷) · Microcontrollers (MCU/MPU/SOC) · QFN-32(4x4)
RJM8L151SK8Q6R from Runjet(瑞纳捷), in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply input for IO and the whole chip, specified at 2.0V to 5.0V with VSS as the corresponding ground. |
| 2 | P12 | bidirectional | GPIO12 with alternate functions SPI2_CLK (master/slave) and TIM3_CC0 compare channel 0. |
| 3 | P13 | bidirectional | GPIO13 with alternate functions SPI2_MISO (master/slave) and TIM3_CC0N complementary compare channel 0. |
| 4 | P14 | bidirectional | GPIO14 with alternate functions SPI2_MOSI (master/slave) and TIM3_CC1 compare channel 1. |
| 5 | P15 | bidirectional | GPIO15 with alternate functions SPI2_CS and TIM3_CC1N complementary compare channel 1. |
| 6 | P16 | bidirectional | GPIO16 with alternate function TIM3_CC2 compare channel 2. |
| 7 | P17 | bidirectional | GPIO17 with alternate functions IIC0_SCL and TIM3_CC2N complementary compare channel 2. |
| 8 | P20 | bidirectional | GPIO20 with alternate functions SPI0_CLK (master/slave), TIM4_CAP1 and ADC_REFN. |
| 9 | P21 | bidirectional | GPIO21 with alternate functions SPI0_MISO (master/slave), TIM4_CAP2 and ADC_REFP. |
| 10 | P23 | bidirectional | GPIO23 with alternate functions SPI0_CS and ADC_IN7 analog input. |
| 11 | P24 | bidirectional | GPIO24 with alternate functions SPI1_CLK (master/slave), TIM4_CC0 and ADC_IN6 analog input. |
| 12 | P25 | bidirectional | GPIO25 with alternate functions SPI1_MISO (master/slave), TIM4_CC0N and ADC_IN5 analog input. |
| 13 | P26 | bidirectional | GPIO26 with alternate functions SPI1_MOSI (master/slave), TIM4_CC1 and ADC_IN4 analog input. |
| 14 | P27 | bidirectional | GPIO27 with alternate functions SPI1_CS, TIM4_CC1N and ADC_IN3 analog input. |
| 15 | P44 | bidirectional | GPIO44 with alternate functions TIM4_CC2 and ADC_IN2 analog input. |
| 16 | P45 | bidirectional | GPIO45 with alternate functions UART1_RX, TIM4_CC2N and ADC_IN1 analog input. |
| 17 | P46 | bidirectional | GPIO46 with alternate function UART1_TX. |
| 18 | P34 | bidirectional | GPIO34 with alternate functions SPI3_CLK (master/slave) and TIM4_BKIN brake input. |
| 19 | P35 | bidirectional | GPIO35 with alternate functions SPI3_MISO (master/slave) and TIM4_CAP0. |
| 20 | P36 | bidirectional | GPIO36 with alternate functions SPI3_MOSI (master/slave) and LPTIM_ETR external event trigger. |
| 21 | P37 | bidirectional | GPIO37 with alternate function SPI3_CS. |
| 22 | HSE_I | input | Input of the HSE external high-speed clock, supporting a 4-24MHz passive crystal. |
| 23 | HSE_O | output | Output of the HSE external high-speed clock, supporting a 4-24MHz passive crystal. |
| 24 | LSE_O | output | Output of the LSE external low-speed clock, supporting a 32.768kHz passive crystal. |
| 25 | LSE_I | input | Input of the LSE external low-speed clock, supporting a 32.768kHz passive crystal. |
| 26 | P00 | bidirectional | GPIO00 with alternate functions RJ_SDA and TIM2_ERT external reload trigger. |
| 27 | P01 | bidirectional | GPIO01 with alternate functions RJ_SCK and TIM2_CC0 compare channel 0. |
| 28 | P02 | bidirectional | GPIO02 with alternate functions IIC0_SDA and TIM2_CC1 compare channel 1. |
| 29 | P03 | bidirectional | GPIO03 with alternate functions UART0_TX, LF_CLK_OUT low-frequency clock output and TIM2_CC2 compare channel 2. |
| 30 | P07 | bidirectional | GPIO07 with alternate function HSO_IN, the external high-speed active oscillator input (1-16MHz). |
| 31 | RST | input | Active-low external reset (NRST); a low level on this pin resets the system. |
| 32 | VSS | power_in | Ground pin for IO and chip operation, corresponding to VDD. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Runjet(瑞纳捷) |
| Package | QFN-32(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 系统时钟频率 | fSYSCLK | 0 | 16 | MHz | 2.0V≤ VDD ≤ 5.0V | 27 | |
| 标准操作电压 | VDD | 2 | 5 | V | - | 27 | |
| 温度范围 | TA | -40 | 85 | ℃ | 2.0V≤ VDD ≤ 5.0V | 27 | |
| 结温范围 | TJ | -40 | 125 | ℃ | -40℃≤ TA ≤85℃ | 27 | |
| 外部供电(包括 ADC 参考电压引脚) | VDD-VSS | -0.3 | 5.5 | V | 26 | ||
| 引脚输入电压容忍值 | VIN | -0.3 | 5.5 | V | 26 | ||
| 静电放电电压(HBM) | VESD | -3000 | 3000 | V | 26 | ||
| 静电放电电压(MM) | VESD | -200 | 200 | V | 26 | ||
| 静电放电电压(CDM) | VESD | -1000 | 1000 | V | 27 | ||
| VDD 电源线总电流(source) | IVDD | 50 | mA | 27 | |||
| VSS 地线总电流(sink) | IVSS | 50 | mA | 27 | |||
| 芯片单个引脚输出电流 | IIO | 6 | mA | 27 | |||
| 保存温度范围 | TSTG | -45 | 150 | ℃ | 27 | ||
| 最大结温 | TJ | 125 | ℃ | 27 | |||
| 输入低电平的电压 | VIL | 0 | V | VSS ≤ VIN ≤ VDD | 27 | ||
| 输出低电平的电压 | VOL | 0 | V | 2.0 ≤ VIN ≤ VDD | 27 | ||
| 上拉等效电阻 | RPU | 22 | 30 | 50 | KΩ | VIN = VSS | 28 |
| 模块供电 | VDD | 2 | 5 | V | 28 | ||
| 外部正参考电压 | VREFPE | 1.5 | 5 | V | 28 | ||
| 外部负参考电压 | VREFNE | 0 | 0.5 | V | 28 | ||
| 环境温度 | TA | -40 | 25 | 105 | ℃ | 28 | |
| 采样和保持时间 | Tsamp | 3.5 | 10.5 | Tmclk | 28 | ||
| 微分线性误差 | ED | -1 | 1 | LSB | 校准后的测量,使用直方图方法得到 | 29 | |
| 积分线性误差 | EI | -2 | 2 | LSB | 29 | ||
| 偏移误差 | EO | -1.5 | 1.5 | LSB | 校准后的测量,利用最佳拟合曲线得到 | 29 | |
| 增益误差 | EG | -1.5 | 1.5 | LSB | 29 | ||
| 未经调整总误差 | ET | -2 | 2 | LSB | 校准后的测量 | 29 | |
| 上升时间 | tr | 0 | 500 | ms | 0< VI≤300mV @t = t1 | 29 | |
| 等待时间 | twait | 12 | us | 29 | |||
| 输入电压 | VI | 0 | 300 | mV | VI on pin VDD @t = t1 | 29 |
CAD (KiCad official)
- Symbol:
RJM8L151SK8Q6R - Footprint:
Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm - 3D model: QFN-32(4x4) (KiCad packages3D, STEP)
- 3D model files:
rjm8l151sk8q6r-etched.step/rjm8l151sk8q6r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);rjm8l151sk8q6r.step/rjm8l151sk8q6r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Runjet(瑞纳捷) datasheet (34 pp, sha256
61bda4a2400a22b8, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# RJM8L151SK8Q6R
**Runjet(瑞纳捷)** · Microcontrollers (MCU/MPU/SOC) · QFN-32(4x4)
RJM8L151SK8Q6R from Runjet(瑞纳捷), in a QFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply input for IO and the whole chip, specified at 2.0V to 5.0V with VSS as the corresponding ground. |
| 2 | P12 | bidirectional | GPIO12 with alternate functions SPI2_CLK (master/slave) and TIM3_CC0 compare channel 0. |
| 3 | P13 | bidirectional | GPIO13 with alternate functions SPI2_MISO (master/slave) and TIM3_CC0N complementary compare channel 0. |
| 4 | P14 | bidirectional | GPIO14 with alternate functions SPI2_MOSI (master/slave) and TIM3_CC1 compare channel 1. |
| 5 | P15 | bidirectional | GPIO15 with alternate functions SPI2_CS and TIM3_CC1N complementary compare channel 1. |
| 6 | P16 | bidirectional | GPIO16 with alternate function TIM3_CC2 compare channel 2. |
| 7 | P17 | bidirectional | GPIO17 with alternate functions IIC0_SCL and TIM3_CC2N complementary compare channel 2. |
| 8 | P20 | bidirectional | GPIO20 with alternate functions SPI0_CLK (master/slave), TIM4_CAP1 and ADC_REFN. |
| 9 | P21 | bidirectional | GPIO21 with alternate functions SPI0_MISO (master/slave), TIM4_CAP2 and ADC_REFP. |
| 10 | P23 | bidirectional | GPIO23 with alternate functions SPI0_CS and ADC_IN7 analog input. |
| 11 | P24 | bidirectional | GPIO24 with alternate functions SPI1_CLK (master/slave), TIM4_CC0 and ADC_IN6 analog input. |
| 12 | P25 | bidirectional | GPIO25 with alternate functions SPI1_MISO (master/slave), TIM4_CC0N and ADC_IN5 analog input. |
| 13 | P26 | bidirectional | GPIO26 with alternate functions SPI1_MOSI (master/slave), TIM4_CC1 and ADC_IN4 analog input. |
| 14 | P27 | bidirectional | GPIO27 with alternate functions SPI1_CS, TIM4_CC1N and ADC_IN3 analog input. |
| 15 | P44 | bidirectional | GPIO44 with alternate functions TIM4_CC2 and ADC_IN2 analog input. |
| 16 | P45 | bidirectional | GPIO45 with alternate functions UART1_RX, TIM4_CC2N and ADC_IN1 analog input. |
| 17 | P46 | bidirectional | GPIO46 with alternate function UART1_TX. |
| 18 | P34 | bidirectional | GPIO34 with alternate functions SPI3_CLK (master/slave) and TIM4_BKIN brake input. |
| 19 | P35 | bidirectional | GPIO35 with alternate functions SPI3_MISO (master/slave) and TIM4_CAP0. |
| 20 | P36 | bidirectional | GPIO36 with alternate functions SPI3_MOSI (master/slave) and LPTIM_ETR external event trigger. |
| 21 | P37 | bidirectional | GPIO37 with alternate function SPI3_CS. |
| 22 | HSE_I | input | Input of the HSE external high-speed clock, supporting a 4-24MHz passive crystal. |
| 23 | HSE_O | output | Output of the HSE external high-speed clock, supporting a 4-24MHz passive crystal. |
| 24 | LSE_O | output | Output of the LSE external low-speed clock, supporting a 32.768kHz passive crystal. |
| 25 | LSE_I | input | Input of the LSE external low-speed clock, supporting a 32.768kHz passive crystal. |
| 26 | P00 | bidirectional | GPIO00 with alternate functions RJ_SDA and TIM2_ERT external reload trigger. |
| 27 | P01 | bidirectional | GPIO01 with alternate functions RJ_SCK and TIM2_CC0 compare channel 0. |
| 28 | P02 | bidirectional | GPIO02 with alternate functions IIC0_SDA and TIM2_CC1 compare channel 1. |
| 29 | P03 | bidirectional | GPIO03 with alternate functions UART0_TX, LF_CLK_OUT low-frequency clock output and TIM2_CC2 compare channel 2. |
| 30 | P07 | bidirectional | GPIO07 with alternate function HSO_IN, the external high-speed active oscillator input (1-16MHz). |
| 31 | RST | input | Active-low external reset (NRST); a low level on this pin resets the system. |
| 32 | VSS | power_in | Ground pin for IO and chip operation, corresponding to VDD. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Runjet(瑞纳捷) |
| Package | QFN-32(4x4) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 系统时钟频率 | fSYSCLK | 0 | | 16 | MHz | 2.0V≤ VDD ≤ 5.0V | 27 |
| 标准操作电压 | VDD | 2 | | 5 | V | - | 27 |
| 温度范围 | TA | -40 | | 85 | ℃ | 2.0V≤ VDD ≤ 5.0V | 27 |
| 结温范围 | TJ | -40 | | 125 | ℃ | -40℃≤ TA ≤85℃ | 27 |
| 外部供电(包括 ADC 参考电压引脚) | VDD-VSS | -0.3 | | 5.5 | V | | 26 |
| 引脚输入电压容忍值 | VIN | -0.3 | | 5.5 | V | | 26 |
| 静电放电电压(HBM) | VESD | -3000 | | 3000 | V | | 26 |
| 静电放电电压(MM) | VESD | -200 | | 200 | V | | 26 |
| 静电放电电压(CDM) | VESD | -1000 | | 1000 | V | | 27 |
| VDD 电源线总电流(source) | IVDD | | | 50 | mA | | 27 |
| VSS 地线总电流(sink) | IVSS | | | 50 | mA | | 27 |
| 芯片单个引脚输出电流 | IIO | | | 6 | mA | | 27 |
| 保存温度范围 | TSTG | -45 | | 150 | ℃ | | 27 |
| 最大结温 | TJ | | | 125 | ℃ | | 27 |
| 输入低电平的电压 | VIL | 0 | | | V | VSS ≤ VIN ≤ VDD | 27 |
| 输出低电平的电压 | VOL | 0 | | | V | 2.0 ≤ VIN ≤ VDD | 27 |
| 上拉等效电阻 | RPU | 22 | 30 | 50 | KΩ | VIN = VSS | 28 |
| 模块供电 | VDD | 2 | | 5 | V | | 28 |
| 外部正参考电压 | VREFPE | 1.5 | | 5 | V | | 28 |
| 外部负参考电压 | VREFNE | 0 | | 0.5 | V | | 28 |
| 环境温度 | TA | -40 | 25 | 105 | ℃ | | 28 |
| 采样和保持时间 | Tsamp | 3.5 | | 10.5 | Tmclk | | 28 |
| 微分线性误差 | ED | -1 | | 1 | LSB | 校准后的测量,使用直方图方法得到 | 29 |
| 积分线性误差 | EI | -2 | | 2 | LSB | | 29 |
| 偏移误差 | EO | -1.5 | | 1.5 | LSB | 校准后的测量,利用最佳拟合曲线得到 | 29 |
| 增益误差 | EG | -1.5 | | 1.5 | LSB | | 29 |
| 未经调整总误差 | ET | -2 | | 2 | LSB | 校准后的测量 | 29 |
| 上升时间 | tr | 0 | | 500 | ms | 0< VI≤300mV @t = t1 | 29 |
| 等待时间 | twait | 12 | | | us | | 29 |
| 输入电压 | VI | 0 | | 300 | mV | VI on pin VDD @t = t1 | 29 |
## CAD (KiCad official)
- Symbol: `RJM8L151SK8Q6R`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm`
- 3D model: QFN-32(4x4) (KiCad packages3D, STEP)
- 3D model files: `rjm8l151sk8q6r-etched.step` / `rjm8l151sk8q6r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `rjm8l151sk8q6r.step` / `rjm8l151sk8q6r.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Runjet(瑞纳捷) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590906169467236352) (34 pp, sha256 `61bda4a2400a22b8`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/rjm8l151sk8q6r-datasheet.pdf)