component
REG710NA-5
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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REG710NA-5
Texas Instruments · DC-DC Converters · SOT-23-6
REG710NA-5 from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vout | power_out | Regulated output supply (5 V for REG710NA-5); connect the output capacitor (2.2 µF typical) to this pin. |
| 2 | GND | power_in | Ground. |
| 3 | Enable | input | Hardware enable/disable pin, high = enable; logic high 1.3 V to VIN, logic low -0.2 V to 0.4 V. |
| 4 | Cpump- | passive | Connect to the flying capacitor (0.22 µF typical). |
| 5 | Vin | power_in | Input supply pin, 1.8 V to 5.5 V (2.7 V to 5.5 V for REG710-5 tested startup); connect the input capacitor to this pin. |
| 6 | Cpump+ | passive | Connect to the flying capacitor (0.22 µF typical). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (IOUT ≤ 10 mA) | VOUT | 4.7 | 5 | 5.3 | V | IOUT ≤ 10 mA, 2.7 V ≤ VIN ≤ 5.5 V | 5 |
| Output voltage (IOUT ≤ 30 mA) | VOUT | 4.7 | 5 | 5.3 | V | IOUT ≤ 30 mA, 3 V ≤ VIN ≤ 5.5 V | 5 |
| Output voltage (IOUT ≤ 60 mA) | VOUT | 4.6 | 5 | 5.4 | V | IOUT ≤ 60 mA, 3.3 V ≤ VIN ≤ 4.2 V | 5 |
| Input voltage range (tested startup) | VIN | 2.7 | 5.5 | V | REG710-5; resistive load no lower than typical VOUT/IOUT | 4 | |
| Operating quiescent current | IQ | 65 | 100 | μA | IOUT = 0 mA, TA = 25°C | 4 | |
| Shutdown current | ISD | 0.01 | 1 | μA | VIN = 1.8 V to 5.5 V, Enable = 0 V, TA = 25°C | 4 | |
| Enable logic high input voltage | 1.3 | V | VIN = 1.8 V to 5.5 V | 4 | |||
| Enable logic low input voltage | -0.2 | 0.4 | V | VIN = 1.8 V to 5.5 V | 4 | ||
| Enable logic high input current | 100 | nA | VIN = 1.8 V to 5.5 V, TA = 25°C | 4 | |||
| Enable logic low input current | 100 | nA | VIN = 1.8 V to 5.5 V, TA = 25°C | 4 | |||
| Oscillator frequency | 1 | MHz | 4 | ||||
| Nominal output current | Iout | 30 | mA | TA = 25°C | 5 | ||
| Short circuit output current | Isc | 100 | mA | TA = 25°C | 5 | ||
| Ripple voltage | 35 | mVPP | IOUT = 30 mA, TA = 25°C | 5 | |||
| Thermal shutdown temperature | 160 | °C | 5 | ||||
| Thermal shutdown recovery | 140 | °C | 5 | ||||
| Supply voltage | VIN | -0.3 | 6 | V | over operating free-air temperature range | 3 | |
| Enable input | Enable | -0.3 | V | max is VIN | 3 | ||
| Operating ambient temperature (abs max) | TA | -55 | 125 | °C | 3 | ||
| Junction temperature (printed 'Operating ambient temperature') | TJ | -55 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -55 | 150 | °C | 3 | ||
| Operating ambient temperature range | TA | -40 | 85 | °C | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged device model, JESD22-C101 | 4 | |
| Junction-to-ambient thermal resistance | RθJA | 184.4 | °C/W | DBV package | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 124.6 | °C/W | DBV package | 4 | ||
| Junction-to-board thermal resistance | RθJB | 30.6 | °C/W | DBV package | 4 | ||
| Junction-to-top characterization parameter | ψJT | 22.1 | °C/W | DBV package | 4 | ||
| Junction-to-board characterization parameter | ψJB | 30.1 | °C/W | DBV package | 4 |
CAD (KiCad official)
- Symbol:
REG710NA-5 - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
reg710na-5-etched.step/reg710na-5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);reg710na-5.step/reg710na-5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
250b6c5d18f12ac8, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# REG710NA-5
**Texas Instruments** · DC-DC Converters · SOT-23-6
REG710NA-5 from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vout | power_out | Regulated output supply (5 V for REG710NA-5); connect the output capacitor (2.2 µF typical) to this pin. |
| 2 | GND | power_in | Ground. |
| 3 | Enable | input | Hardware enable/disable pin, high = enable; logic high 1.3 V to VIN, logic low -0.2 V to 0.4 V. |
| 4 | Cpump- | passive | Connect to the flying capacitor (0.22 µF typical). |
| 5 | Vin | power_in | Input supply pin, 1.8 V to 5.5 V (2.7 V to 5.5 V for REG710-5 tested startup); connect the input capacitor to this pin. |
| 6 | Cpump+ | passive | Connect to the flying capacitor (0.22 µF typical). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management ICs |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage (IOUT ≤ 10 mA) | VOUT | 4.7 | 5 | 5.3 | V | IOUT ≤ 10 mA, 2.7 V ≤ VIN ≤ 5.5 V | 5 |
| Output voltage (IOUT ≤ 30 mA) | VOUT | 4.7 | 5 | 5.3 | V | IOUT ≤ 30 mA, 3 V ≤ VIN ≤ 5.5 V | 5 |
| Output voltage (IOUT ≤ 60 mA) | VOUT | 4.6 | 5 | 5.4 | V | IOUT ≤ 60 mA, 3.3 V ≤ VIN ≤ 4.2 V | 5 |
| Input voltage range (tested startup) | VIN | 2.7 | | 5.5 | V | REG710-5; resistive load no lower than typical VOUT/IOUT | 4 |
| Operating quiescent current | IQ | | 65 | 100 | μA | IOUT = 0 mA, TA = 25°C | 4 |
| Shutdown current | ISD | | 0.01 | 1 | μA | VIN = 1.8 V to 5.5 V, Enable = 0 V, TA = 25°C | 4 |
| Enable logic high input voltage | | 1.3 | | | V | VIN = 1.8 V to 5.5 V | 4 |
| Enable logic low input voltage | | -0.2 | | 0.4 | V | VIN = 1.8 V to 5.5 V | 4 |
| Enable logic high input current | | | 100 | | nA | VIN = 1.8 V to 5.5 V, TA = 25°C | 4 |
| Enable logic low input current | | | 100 | | nA | VIN = 1.8 V to 5.5 V, TA = 25°C | 4 |
| Oscillator frequency | | | 1 | | MHz | | 4 |
| Nominal output current | Iout | | 30 | | mA | TA = 25°C | 5 |
| Short circuit output current | Isc | | 100 | | mA | TA = 25°C | 5 |
| Ripple voltage | | | 35 | | mVPP | IOUT = 30 mA, TA = 25°C | 5 |
| Thermal shutdown temperature | | | 160 | | °C | | 5 |
| Thermal shutdown recovery | | | 140 | | °C | | 5 |
| Supply voltage | VIN | -0.3 | | 6 | V | over operating free-air temperature range | 3 |
| Enable input | Enable | -0.3 | | | V | max is VIN | 3 |
| Operating ambient temperature (abs max) | TA | -55 | | 125 | °C | | 3 |
| Junction temperature (printed 'Operating ambient temperature') | TJ | -55 | | 150 | °C | | 3 |
| Storage temperature | Tstg | -55 | | 150 | °C | | 3 |
| Operating ambient temperature range | TA | -40 | | 85 | °C | | 4 |
| ESD HBM | V(ESD) | -2000 | | 2000 | V | Human body model, ANSI/ESDA/JEDEC JS-001 | 4 |
| ESD CDM | V(ESD) | -500 | | 500 | V | Charged device model, JESD22-C101 | 4 |
| Junction-to-ambient thermal resistance | RθJA | | 184.4 | | °C/W | DBV package | 4 |
| Junction-to-case (top) thermal resistance | RθJC(top) | | 124.6 | | °C/W | DBV package | 4 |
| Junction-to-board thermal resistance | RθJB | | 30.6 | | °C/W | DBV package | 4 |
| Junction-to-top characterization parameter | ψJT | | 22.1 | | °C/W | DBV package | 4 |
| Junction-to-board characterization parameter | ψJB | | 30.1 | | °C/W | DBV package | 4 |
## CAD (KiCad official)
- Symbol: `REG710NA-5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `reg710na-5-etched.step` / `reg710na-5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `reg710na-5.step` / `reg710na-5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/reg710na-5.pdf) (38 pp, sha256 `250b6c5d18f12ac8`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/reg710na-5-datasheet.pdf)