component
REG113NA-2.5
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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REG113NA-2.5
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
REG113NA-2.5 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply input for the regulator; operating input range is 1.8 V to 10 V, and VIN must be at least VOUT + 0.4 V for specified regulation (absolute maximum -0.3 V to 12 V). |
| 2 | GND | power_in | Ground reference pin; ground pin current is typically 850 µA at IOUT = 400 mA and drops to about 10 nA when the regulator is disabled. |
| 3 | Enable | input | Active-high enable input that is TTL/CMOS compatible: above 1.8 V the output is enabled, below 0.5 V the output is disabled, and the absolute maximum is -0.3 V to VIN; it can be tied to VIN when not used. |
| 4 | NR | passive | Noise reduction pin connected to the internal bandgap reference; an optional capacitor CNR (for example 0.01 µF) to ground forms a low-pass filter that reduces output noise, with an absolute maximum voltage of -0.3 V to 6.0 V. |
| 5 | VOUT | power_out | Regulated output for the 2.5 V version, with accuracy of ±1.5% max and internal current limit typically 500 mA; no output capacitor is required for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
REG113NA-2.5 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
reg113na-2-5-etched.step/reg113na-2-5-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);reg113na-2-5.step/reg113na-2-5.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
c0da90b6895895f3, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# REG113NA-2.5
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
REG113NA-2.5 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Supply input for the regulator; operating input range is 1.8 V to 10 V, and VIN must be at least VOUT + 0.4 V for specified regulation (absolute maximum -0.3 V to 12 V). |
| 2 | GND | power_in | Ground reference pin; ground pin current is typically 850 µA at IOUT = 400 mA and drops to about 10 nA when the regulator is disabled. |
| 3 | Enable | input | Active-high enable input that is TTL/CMOS compatible: above 1.8 V the output is enabled, below 0.5 V the output is disabled, and the absolute maximum is -0.3 V to VIN; it can be tied to VIN when not used. |
| 4 | NR | passive | Noise reduction pin connected to the internal bandgap reference; an optional capacitor CNR (for example 0.01 µF) to ground forms a low-pass filter that reduces output noise, with an absolute maximum voltage of -0.3 V to 6.0 V. |
| 5 | VOUT | power_out | Regulated output for the 2.5 V version, with accuracy of ±1.5% max and internal current limit typically 500 mA; no output capacitor is required for stability. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `REG113NA-2.5`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `reg113na-2-5-etched.step` / `reg113na-2-5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `reg113na-2-5.step` / `reg113na-2-5.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/reg113) (22 pp, sha256 `c0da90b6895895f3`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/reg113na-2-5-datasheet.pdf)