component
REG113EA-3
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownREG113EA-3
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · VSSOP-8
REG113EA-3 from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Enable | input | Active-high enable input compatible with TTL-CMOS levels; inputs below 0.5V (max) disable the regulator, and it must be at least 1.8V to enable the output, with VEN absolute maximum of VIN; it can be tied to VIN when unused. |
| 2 | VIN | power_in | Supply input with an operating input voltage range of 1.8V to 10V (absolute maximum 12V); a 0.1µF low-ESR capacitor across the input is recommended. |
| 3 | VOUT | power_out | Regulated output for the 3.0V version, specified from 5mA to 400mA load with ±1.5% maximum accuracy, and no output capacitor is required for stability. |
| 4 | NR | passive | Noise reduction pin where an optional capacitor CNR (0.01µF typical) to ground forms a low-pass filter on the reference, with absolute maximum voltage of -0.3V to 6.0V. |
| 5 | GND | power_in | Ground; leads 5 through 8 are fused to the lead frame and can be used for improved thermal dissipation. |
| 6 | GND | power_in | Ground; fused to the lead frame and usable as a thermal path together with leads 5, 7 and 8. |
| 7 | GND | power_in | Ground; fused to the lead frame and usable as a thermal path together with leads 5, 6 and 8. |
| 8 | GND | power_in | Ground; fused to the lead frame and usable as a thermal path together with leads 5 through 7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
REG113EA-3 - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
reg113ea-3-etched.step/reg113ea-3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);reg113ea-3.step/reg113ea-3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (22 pp, sha256
c0da90b6895895f3, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).